Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2011-04-05
2011-04-05
Wilczewski, Mary (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S287000, C438S288000, C438S591000, C438S773000, C438S954000, C257SE21679
Reexamination Certificate
active
07919372
ABSTRACT:
A semiconductor device having a silicon oxide/silicon nitride/silicon oxide (“ONO”) structure is formed by providing a first silicon oxide layer and a silicon nitride layer over a substrate having a memory region and a logic device region; patterning the first silicon oxide layer and the silicon nitride layer to define bottom oxide and silicon nitride portions of partially completed ONO stacks and to expose the substrate in the logic device regions; performing a rapid thermal annealing process in the presence of a radical oxidizing agent to form concurrently a second silicon oxide layer on the exposed surface of the silicon nitride layer and a gate oxide layer over the substrate; and depositing a conductive layer over the completed ONO stacks and the gate oxide. The invention is employed in manufacture of, for example, memory devices having and peripheral logic devices and memory cells including ONO structures. Exposing the patterned silicon nitride to the oxygen radical during the RTO according to the invention significantly reduces the processing time, and reduces the thermal budget. Moreover, because according to the invention the upper surface and the sidewalls of the silicon nitride layer are covered by the top oxide layer, the silicon nitride is not exposed during a subsequent cleaning process. As a result of increased contact area between the polysilicon gate and the top oxide layer, the coupling ratio of the gate is increased.
REFERENCES:
patent: 4949154 (1990-08-01), Haken
patent: 5768192 (1998-06-01), Eitan
patent: 5861347 (1999-01-01), Maiti et al.
patent: 5966603 (1999-10-01), Eitan
patent: 6037273 (2000-03-01), Gronet et al.
patent: 6074917 (2000-06-01), Chang et al.
patent: 6117730 (2000-09-01), Komori et al.
patent: 6159866 (2000-12-01), Gronet et al.
patent: 6171911 (2001-01-01), Yu
patent: 6184155 (2001-02-01), Yu et al.
patent: 6255230 (2001-07-01), Ikakura et al.
patent: 6383861 (2002-05-01), Gonzalez et al.
patent: 6613632 (2003-09-01), Liu et al.
patent: 6670246 (2003-12-01), Hsiao et al.
patent: 6677200 (2004-01-01), Lee et al.
patent: 6803279 (2004-10-01), Eitan
patent: 6946349 (2005-09-01), Lee et al.
patent: 7098147 (2006-08-01), Nansei et al.
patent: 7232724 (2007-06-01), Shiraiwa et al.
patent: 7297597 (2007-11-01), Dong et al.
patent: 2001/0000247 (2001-04-01), Shimada et al.
patent: 2003/0040189 (2003-02-01), Chang et al.
patent: 2003/0185071 (2003-10-01), Yoshino
patent: 2004/0009642 (2004-01-01), Yoo et al.
patent: 2004/0203253 (2004-10-01), Yao
patent: 2005/0106811 (2005-05-01), Forbes
Chen Chong-Mu
Chen Hsin-Huei
Chiou Jia-Rong
Huang Chong-Jen
Liu Kuang-Wen
Haynes Beffel & Wolfeld LLP
Macronix International Co. Ltd.
Thomas Toniae M
Wilczewski Mary
LandOfFree
Method for forming oxide on ONO structure does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for forming oxide on ONO structure, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for forming oxide on ONO structure will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2665468