Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2005-12-06
2005-12-06
Norton, Nadine G. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S698000, C438S699000, C438S700000, C438S708000, C438S724000
Reexamination Certificate
active
06972259
ABSTRACT:
The invention is directed towards a method for forming openings in low-k dielectric layers and a structure for forming an opening thereof. A mask layer comprising at least one metal hard mask layer and one or more hard mask layers is applied on the dielectric layer for forming the opening.
REFERENCES:
patent: 6323121 (2001-11-01), Liu et al.
patent: 6444557 (2002-09-01), Biolsi et al.
Chen Tong-Yu
Wang Chih-Jung
J.C. Patents
Norton Nadine G.
Tran Binh X.
United Microelectronics Corp.
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