Method for forming multi-level mask ROM cell and NAND...

Details Method for forming multi-level mask ROM cell and NAND... Method for forming multi-level mask ROM cell and NAND...

2006-08-22

2006-08-22

Chaudhari, Chandra (Department: 2891)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257SE21671

Reexamination Certificate

active

07094649

ABSTRACT:
The present invention relates to a multi-level read only memory cell that can store two bits and the fabrication method thereof. The multi-level ROM cell has the storage capacity of two bits and the resultant NAND type ROM memory array can provide four logic states of two bits, thus increasing the data storage capacity.

REFERENCES:
patent: 5691216 (1997-11-01), Yen et al.
patent: 6180463 (2001-01-01), Otsuki
patent: 6734064 (2004-05-01), Yang et al.

Affiliated with

Also associated with

Rating

Method for forming multi-level mask ROM cell and NAND... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for forming multi-level mask ROM cell and NAND..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for forming multi-level mask ROM cell and NAND... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3648387