Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-09-16
2008-09-16
Nguyen, Thanh (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S381000, C257SE27144
Reexamination Certificate
active
11239986
ABSTRACT:
A microelectronic assembly and a method for forming the same are provided. The method includes forming first and second lateral etch stop walls in a semiconductor substrate having first and second opposing surfaces. An inductor is formed on the first surface of the semiconductor substrate and a hole is formed through the second surface of the substrate to expose the substrate between the first and second lateral etch stop walls. The substrate is isotropically etched between the first and second lateral etch stop walls through the etch hole to create a cavity within the semiconductor substrate. A sealing layer is formed over the etch hole to seal the cavity.
REFERENCES:
patent: 6727572 (2004-04-01), Maeda et al.
patent: 6737727 (2004-05-01), Gates et al.
patent: 6939788 (2005-09-01), Davies
patent: 2002/0098611 (2002-07-01), Chang et al.
patent: 2004/0188674 (2004-09-01), Gates et al.
patent: 2005/0012153 (2005-01-01), Ipposhi
patent: 2005/0012175 (2005-01-01), Tsuruta
patent: 2005/0023639 (2005-02-01), Yeh et al.
Chunbo Zhang et al., Fabrication of thick silicon dioxide layers using DRIE, oxidation and trench refill, MEMS 2002 Conference. pp. 160-163, 2002.
Hongrui Jiang et al., On-chip spiral inductors suspended over deep copper-lined cavities, Microwave Theory and Techniques, IEEE Transactions on, vol. 48, Issue 12, Dec. 2000, pp. 2415-2423.
Guoan Wang et. al., Finite Ground Coplanar lines on CMOS grade silicon with a thick embedded silicon oxide layer using micromachining techniques, Microwave Conference, 2003. 33rd European, vol. 1, Oct. 7-9, 2003 pp. 25-27.
Mina Raieszadeh et al., High Q Integrated Inductors in Trenched silicon islands, MEMS 2005 conference, pp. 199-202.
John D. Brazzle et al., Modeling and characterization of sacrificial polysilicon etching using vapor-phase xenon diflouride, IEEE 2004, pp. 737-740.
Freescale Semiconductor Inc.
Ingrassia Fisher & Lorenz P.C.
Nguyen Thanh
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