Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2005-03-01
2005-03-01
Pham, Long (Department: 2814)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S734000, C438S737000
Reexamination Certificate
active
06861347
ABSTRACT:
A method for forming a metal wiring layer in a semiconductor device using a dual damascene process is provided. A stopper layer, an interlayer insulating layer, and a hard mask layer are sequentially formed on a semiconductor substrate having a conductive layer. A first photoresist pattern that comprises a first opening having a first width is formed on the hard mask layer. The hard mask layer and portions of the interlayer insulating layer are etched using the first photoresist pattern as an etching mask, thereby forming a partial via hole having the first width. The first photoresist pattern is removed. An organic material layer is coated on the semiconductor substrate having the partial via hole is formed to fill the partial via hole with the organic material layer. A second photoresist pattern that comprises a second opening aligned with the partial via hole and having a second width greater than the first width is formed on the coated semiconductor substrate. The organic material layer and the hard mask layer on the interlayer insulating layer are etched using the second photoresist pattern as an etching mask. The second photoresist pattern and the organic material layer are simultaneously removed. A wiring region having the second width and a via hole having the first width are formed by etching the interlayer insulating layer using the hard mask layer as an etching mask.
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Kim Jae-hak
Lee Kyoung-woo
Lee Soo-geun
Shin Hong-jae
Peralta Ginette
Pham Long
Samsung Electronics Co,. Ltd.
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