Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-02-01
2005-02-01
Thompson, Craig A. (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
Reexamination Certificate
active
06849503
ABSTRACT:
To form metal interconnections in a flash memory device, the gate of the peripheral region is etched to form a first contact hole on a substrate. Silicon nitride and first oxide films are formed on the gate including the first contact hole. The first oxide film is etched to expose the source and filled by a first plug. A second oxide film is formed and etched with the first oxide films to form second contact holes exposing the drain, the source, and the first contact hole that are filled by second plugs. A third oxide film is formed and etched to form third contact holes exposing the first and second plugs and a portion of the second oxide film corresponding to the drain. The second and first oxide films are etched to form fourth contact holes exposing the first and second plugs and the drain. Metal interconnections fills the fourth contact holes.
REFERENCES:
patent: 20030089996 (2003-05-01), Hau-Riege
LandOfFree
Method for forming metal interconnections for flash memory... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for forming metal interconnections for flash memory..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for forming metal interconnections for flash memory... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3514021