Method for forming high voltage device

Details Method for forming high voltage device Method for forming high voltage device

1998-10-28

2000-05-16

Fourson, George

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438297, 438529, H01L 21336

Patent

active

060636742

ABSTRACT:
A method for forming high voltage devices is provided. A P-type semiconductor substrate is provided. An oxide layer is formed on the P-type semiconductor substrate. A first P-well and a second P-well are formed in the P-type semiconductor substrate. A first N-well is formed in the second p-well and a second N-well is formed in the first P-well. A field oxide layer on the second N-well and a gate oxide layer are formed on the P-type substrate. A polysilicon layer is formed and defined as a gate on the gate oxide layer across a portion of the field oxide layer and aportion of the first N-well. A source region is formed in the first N-well and a drain region is formed in the second N-well. A P.sup.+ -type doped region is formed between the substrate and the source region across a part of the first N-well within the second P-well.

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patent: 5739061 (1998-04-01), Kitamura et al.
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