Method for forming gate oxide film in semiconductor device

Details Method for forming gate oxide film in semiconductor device Method for forming gate oxide film in semiconductor device

1999-11-18

2002-03-12

Bowers, Charles (Department: 2813)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

By reaction with substrate

C438S758000, C438S761000, C438S769000, C438S786000

Reexamination Certificate

active

06355579

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a method for forming a gate oxide film in a semiconductor device, in which a gate oxide film is formed by first/second oxidizing
itriding processes using gases having different nitrogen contents for improving device performances.
2. Background of the Related Art
In general, the gate oxide film is formed by thermal oxidation using a furnace. However, since the gate oxide film formed by the thermal oxidation can not meet dielectric characteristic requirements for high density device packings, RTP(Rapid Thermal Process) oxidation using N
2
O or NO gas is newly suggested.
A related art method for forming a gate oxide film in a semiconductor device will be explained with reference to the attached drawings.
FIGS. 1
a
~
1
h
illustrate sections showing the steps of a related art method for forming a gate oxide film in a semiconductor device.
Referring to
FIG. 1
a
, the related art method for forming a gate oxide film in a semiconductor device by the RTP oxidation starts from forming a device isolation layer
2
by field oxidation on a device isolation region in a semiconductor substrate
1
. Then, a sacrificial oxide film
7
is formed on an active region defined by the device isolation layer
2
for suppressing possible damages to the substrate
1
in a later process. The active region includes an NMOS and a PMOS transistor forming regions. A photoresist layer
3
is formed on the PMOS transistor forming region having the sacrificial oxide film
7
formed thereon, and impurity is injected into the NMOS transistor forming region for forming a p type well therein using the photoresist layer
3
as a mask. Then, as shown in
FIG. 1
b
, the photoresist layer
3
is removed, a photoresist layer
4
is formed on the NMOS transistor forming region again, and impurity is injected into the PMOS transistor forming region for forming an n type well therein using the photoresist layer
4
as a mask. As shown in
FIG. 1
c
, the p type well
5
and the n type well
6
are formed by a well diffusion process. As shown in
FIG. 1
d
, a photoresist layer
8
is formed on the PMOS transistor forming region having the n type well
6
formed therein, and impurity ions are injected therein for adjusting a threshold voltage of the transistor. As shown in
FIG. 1
e
, the photoresist layer
8
is removed, a photoresist layer
9
is formed again on the NMOS transistor forming region having the p type well
5
formed therein, and impurity ions are injected into the PMOS transistor forming region having the n type well
6
formed therein for adjusting a threshold voltage of the transistor. Then, as shown in
FIG. 1
f
, the sacrificial oxide film
7
is removed, which was formed for preventing damages to be otherwise given to the substrate in the impurity injection for forming the well regions and in the impurity injection for adjusting the threshold voltage. And, as shown in
FIG. 1
g
, a gate oxide film
10
is formed by wet oxidation using a pyro system furnace. Different from the aforementioned oxidation, as shown in
FIG. 1
h
, a RTP equipment is used in processing an oxynitridation in an N
2
O or NO gas ambient, to form a gate oxide film
11
containing nitrogen. Though not shown, polysilicon, barrier metal, gate metal, and gate capping layers are formed on an entire surface of the semiconductor substrate
1
and subjected to selective patterning, to form a gate line. In order to meet the dielectric characteristic requirements for the device, a thickness of the gate oxide film should be below 50 Å in the case when the gate oxide film is formed by the related art thermal oxidation. However, the electron tunneling occurred in the case of the gate oxide film with a thickness below 50 Å deteriorates device performances. The RTP oxide
itride film formed using N
2
O or NO gas suggested for solving the foregoing problem meets the dielectric constant requirement for a high density device packing.
However, the related art gate oxide film in a semiconductor device has the following problems.
First, the oxide film formed using a furnace can not meet the dielectric constant requirement for a high density device packing, and the oxide film formed to a thickness below 50 Å for meeting the dielectric constant requirement causes electron tunneling, that is not suitable for a gate insulating layer.
Second, the oxide
itride film formed in a RTP equipment using N
2
O or NO gas is involved in deterioration of TDDB(Time Dependent Dielectric Breakdown) coming from a breakdown voltage drop of the gate oxide layer and a leakage current increase caused by a nitrogen content increase at an interface of the oxide
itride film and the substrate and an increased roughness of the interface, which drops a device reliability.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a method for forming a gate oxide film in a semiconductor device that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a method for forming a gate oxide film in a semiconductor device, which can improve a device performance.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, the method for forming a gate oxide film in a semiconductor device includes the steps of (1) providing a semiconductor substrate, (2) conducting a thermal process in a compound gas environment of oxygen and nitrogen having a nitrogen content below 5%, to form a first oxynitride film on the semiconductor substrate, and (3) conducting a thermal process in a compound gas environment of oxygen and nitrogen having a nitrogen content equal to or over 5%, to form a second oxynitride film, thereby forming a gate oxide film by a first and second processes of oxidizing and nitriding, wherein the first process uses gases having different nitrogen contents from the second process, whereby improving device performances.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.


REFERENCES:
patent: 4282270 (1981-08-01), Nozaki et al.
patent: 5405806 (1995-04-01), Pfiester et al.
patent: 5407870 (1995-04-01), Okada et al.
patent: 5512519 (1996-04-01), Hwang
patent: 5674788 (1997-10-01), Wristers et al.
patent: 6207587 (2001-03-01), Li et al.
patent: 6235590 (2001-05-01), Daniel et al.
Knolle et al., “Plasma Deposited Silicon Oxynitride from Silane, Nitrogen, and Carbon Dioxide or Carbon Monoxide or Nitric Oxide”, J. Electrochem. Soc., vol. 139, No. 11, Nov. 1992.*
G. Bronner et al., “A Fully Planarized 0.25&mgr;m CMOS Technology for 256Mbit DRAM and Beyond”, 1995 Symposium on VLSI Technology Digest of Technical Papers, pp. 15-16.
E. Wu et al., “Thickness and Polarity Dependence of Intrinsic Breakdown of Ultra-Thin Reoxidized-Nitride for DRAM Technology Applications”, 1997 IEDM, pp. 4.2.1-4.2.4.
Y. Okayama et al., “Nitrogen Concentration Optimization for Down-Scaled CMOSFET with N2O-based Oxynitride Process”, 1998 Symposium on VLSI Technology of Technical Papers, pp. 220-221.

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