Method for forming gate dielectric layers

Details Method for forming gate dielectric layers Method for forming gate dielectric layers

2006-12-13

2009-06-23

Nguyen, Ha Tran T (Department: 2829)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S258000, C438S261000, C438S981000

Reexamination Certificate

active

07550349

ABSTRACT:
A method for forming gate dielectric layers having different thicknesses is provided, The method includes forming a lower oxide layer, a nitride layer, and an upper oxide layer on a semiconductor substrate; performing a first deglaze process to the semiconductor substrate keeping the lower oxide layer, the nitride layer, and the upper oxide layer in a first region, while removing the nitride layer and the upper oxide layer in second, third, and fourth regions; forming the first gate dielectric layer having a first thickness in the second, third, and fourth regions; performing a second deglaze process to the first gate dielectric layer in the third region, thereby forming a second gate dielectric layer having a second thickness; and performing a third deglaze process on the first gate dielectric layer on the fourth region, thereby forming a third gate dielectric layer having a third thickness.

REFERENCES:
patent: 2005/0023604 (2005-02-01), Kim et al.
patent: 2006/0223266 (2006-10-01), Lim et al.
patent: 1620718 (2005-05-01), None
patent: WO 03/073491 (2003-09-01), None
Office Action issued on May 9, 2008, from the State Intellectual Property Office of the People's Republic of China in counterpart Chinese Application No. 200610168809.0.

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