Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-11-12
1999-04-13
Tsai, Jey
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438276, H01L 218246
Patent
active
058937382
ABSTRACT:
A semiconductor mask-programmable read-only-memory array structure provides double density storage of data information by means of thin film memory cell transistors formed on both sides of a layer of thin film polysilicon. At a bottom surface of a layer of thin film polysilicon which has a bottom gate oxide grown thereon, a plurality of polysilicon bottom cell wordlines intersects a plurality of bitlines to form an array of bottom cell memory transistors. The bitlines are heavily-doped diffusion regions within the layer thin film polysilicon. Additionally, a top surface of the layer of thin film polysilicon has a top gate oxide grown thereon. Over this top gate oxide, a plurality of polysilicon top cell wordlines intersects the plurality of bitlines to form an array of top cell memory transistors, thereby producing a NOR-type read-only-memory array structure with double the storage density of conventional, prior art structures.
REFERENCES:
patent: 5490106 (1996-02-01), Tasaka
patent: 5585296 (1996-12-01), Chung et al.
patent: 5691216 (1997-11-01), Yen et al.
Chen Chung-Ju
Wang Mam-Tsung
Haynes Mark A.
Macronix International Co. Ltd.
Tsai Jey
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