Method for forming capacitor of semiconductor device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S243000, C438S250000, C438S386000, C438S393000, C438S396000

Reexamination Certificate

active

06410381

ABSTRACT:

CROSS REFERENCE TO RELATED APPLICATIONS
This application claims priority from Korean Patent Application No. 2000-30090, filed Jun. 1, 2000, the entirety of which is incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for forming a capacitor of a semiconductor device, and in particular to an improved method for forming a capacitor of a semiconductor device which can increase a capacitance and prevent a leakage current at the same time.
2. Description of the Background Art
The capacitance of a capacitor used as a data storage unit in the semiconductor device is dependent upon the area of the electrode, the gap between the electrodes and a dielectric constant of a dielectric film inserted between the electrodes. However, semiconductor devices have become highly integrated. Accordingly, the capacitor formation region of the semiconductor device has decreased, and thus the area of the electrode of the capacitor has also decreased, thereby reducing the capacitance of the capacitor.
Therefore, in a capacitor having a structure of metal film—dielectric film—metal film (MIM), an Ru film is deposited as a lower electrode, a TaON film having a high dielectric constant is deposited thereon, and a metal film is deposited on the dielectric film, thereby maximizing the capacitance of the TaON capacitor.
FIGS. 1 and 2
are cross-sectional diagrams illustrating sequential steps of a conventional method for forming a capacitor of a semiconductor device.
As illustrated in
FIG. 1
, a semiconductor substrate(not shown) including a MOSFET is provided. Here, a polysilicon film
5
for a plug and a barrier metal film
6
consisting of a Ti/TiN film are sequentially stacked on an interlayer insulation film
4
having a contact hole(not shown) exposing one of the junction regions of the MOSFET(not shown).
A cap oxide film
7
is deposited on the semiconductor substrate
2
in order to form a cylindrical capacitor.
Thereafter, the cap oxide film
7
is patterned to define a capacitor region and expose the interlayer insulation film
4
and the barrier metal film
6
.
An Ru film
8
for a lower electrode is deposited over the patterned cap oxide film
7
a.
When the metal film is used as the lower electrode, a leakage current property may be improved according to quality of the lower electrode.
In addition, the Ru film
8
may be deposited as the lower electrode according a chemical vapor deposition (CVD), a physical vapor deposition (PVD), a low pressure chemical vapor deposition (LPCVD) and a plasma enhanced chemical vapor deposition (PECVD).
When the Ru film
8
is deposited according to the CVD, a deposition rate of the Ru film
8
is slow on the cap oxide film
7
a,
and the surface of the Ru film
8
is inferior. It is thus difficult to apply the CVD to the actual process.
On the other hand, when the Ru film
8
is deposited according to the PECVD, the quality of the film is superior, but a step coverage, namely a deposition state is inferior. Accordingly, the PECVD is not suitable for the method for forming the capacitor.
When the Ru film
8
is deposited according to the LPCVD, the step coverage is superior, but the quality of the film is reduced, as compared with the PECVD.
As a result, the Ru film
8
is deposited according to the PVD, and re-deposited according to the CVD, thereby improving the deposition rate and quality of the Ru film
8
.
Referring to
FIG. 2
, a chemical mechanical polishing process is performed on the Ru film
8
for the lower electrode, and the cap oxide film
7
a
is removed, thereby forming an Ru film
8
a
which is a cylindrical lower electrode. A TaON film
9
having a high dielectric constant is formed on the cylindrical Ru film
8
a,
and an upper electrode
10
is formed on the TaON film
9
, thereby forming the capacitor of the semiconductor device.
However, the conventional method for forming the capacitor of the semiconductor device has the following disadvantages.
When the Ru film is deposited as the lower electrode, the deposition rate and quality of the Ru film can be improved by depositing the Ru film according to the PVD, and re-depositing the Ru film according to the CVD. However, such a deposition process cannot be performed in in-situ, and thus an impurity may be put on the wafer surface during a transfer from one chamber to another chamber.
SUMMARY OF THE INVENTION
Accordingly, the present invention provides a method for forming a capacitor of a semiconductor device which can improve a film quality of a lower electrode.
Additionally, the present invention provides a method for forming a capacitor of a semiconductor device which can obtain a high capacitance and a low leakage current at the same time.
The present invention thus provides a method for forming a capacitor of a semiconductor device, including the steps of depositing a cap oxide film on a semiconductor substrate; patterning the cap oxide film to expose a capacitor region of the semiconductor substrate; consecutively depositing an Ru film for a lower electrode on the patterned cap oxide film and the semiconductor substrate in in-situ according to a low pressure chemical vapor deposition and a plasma enhanced chemical vapor deposition; forming a cylindrical lower electrode, by performing a chemical mechanical polishing process on the Ru film and removing the cap oxide film; forming an amorphous TaON film on the lower electrode; crystallizing the amorphous TaON film according to a thermal treatment; and forming a metal film for an upper electrode on the crystallized TaON film.
In addition, there is provided a method for forming a capacitor of a semiconductor device, including the steps of depositing a cap oxide film on a semiconductor substrate; patterning the cap oxide film to expose a capacitor region of the semiconductor substrate; consecutively depositing an Ru film for a lower electrode on the patterned cap oxide film and the semiconductor substrate in in-situ according to a low pressure chemical vapor deposition and a plasma enhanced chemical vapor deposition; forming a cylindrical lower electrode, by performing a chemical mechanical polishing process on the Ru film and removing the cap oxide film; forming an amorphous TaON film on the lower electrode; performing a plasma treatment on the amorphous TaON film; crystallizing the amorphous TaON film according to a thermal treatment such as an RTP; and forming a metal film for an upper electrode on the crystallized TaON film.


REFERENCES:
patent: 6326259 (2001-12-01), Kim et al.
patent: 2001/0006838 (2001-07-01), Won et al.
patent: 2002/0001893 (2002-01-01), Kim et al.
patent: 2002/0019110 (2002-02-01), Lee et al.
D.Y. Yang et al., Characterization of Ru Electrodes for Ru/(Ba,Sr)TiO3/Ru Capacitors. IEEE 1996, pp. 515-518.*
J.W. Kim et al., Development of Ru/Ta2O3/Ru Capacitor Technology for Giga-Scale DRAMs. IEDM 1999, pp. 793-796.*
S-J. Won et al., Conformal CVD-Ruthenium Process for MIM Capacitor in Giga-Bit DRAMs. IEDM 2000, pp. 789-792.*
W.D. Kim et al., Development of CVD-Ru/Ta2O5/CVD-TiN Capacitor for Multigigabit-Scale DRAM Generation. IEEE 2000, pp. 100-101.*
M. Hiratani et al., A Conformal Ruthenium Electrode for MIM Capacitors in Gbit DRAMs Using the CVD Technology Based on Oxygen-Controlled Surface Reaction. IEEE 2000, pp. 102-103.*
Y. Fukuzumi et al., Liner-Supported Cylinder (LSC) Technology to Realize Ru/Ta2O5/Ru Capacitor for Future DRAMs. IEDM 2000, pp. 793-796.

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