Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2004-02-06
2004-11-16
Goudreau, George A. (Department: 1763)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S694000, C438S714000, C438S719000, C438S734000, C134S001300
Reexamination Certificate
active
06818502
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a method for forming a capacitor, and more particularly relates to a method for forming a capacitor in which semispherical silicon grains are formed on the surface of a cylindrical bottom electrode in the fabrication process of a semiconductor device.
2. Description of Related Art
The area that the capacitor occupies is being reduced increasingly in a DRAM (Dynamic Random Access Memory) cell with increasing degree of integration and function of the semiconductor device. On the other hand, to prevent soft error due to &agr; ray in order to render a memory cell functional, it is required to secure the capacitance of a certain level and thereby secure the sufficient margin to the noise. In the technical field of the DRAM cell capacitor, a method in which a ferroelectric film having high dielectric constant is used or a method in which a bottom electrode (namely memory node) formed in the shape of cylinder to increase the surface area is used to increase the capacitance has been applied.
To increase the capacitance the more, Japanese Published Unexamined Patent Application No. Hei 8-306646 proposes a method in which hemispherical grained silicon (referred to as HSG-Si hereinafter) is formed on the surface of an electrode.
A method for forming a cylindrical capacitor to which the above-mentioned method is applied is described herein under.
First, as shown in
FIG. 3A
, a cylinder core layer
2
consisting of silicon oxide is formed on a substrate
1
, and the cylinder core layer
2
is patterned to form a hole core pattern
2
a
. Next, an amorphous silicon film
3
is formed so as to cover the inside wall of the core pattern
2
a
, and then the amorphous silicon film
3
on the cylinder core layer
2
is removed partially so as to remain only on the inside wall of the core pattern
2
a
. As the result, a cylindrical bottom electrode
3
a
consisting of amorphous silicon is formed. Next, as shown in
FIG. 3B
, the cylinder core layer
2
on the substrate
1
is removed by means of wet etching.
Next, as shown in
FIG. 3C
, HSG-Si
5
is formed on the surface of the bottom electrode
3
a
. At that time, first a natural oxide film (not shown in the drawing) that has grown on the surface of the bottom electrode
3
a
is removed by means of etching with diluted hydrofluoric acid (DHF). Next, silane gas (SiH
4
) is fed to the surface of the bottom electrode
3
a
to form a grained Si film (not shown in the drawing) and then the semifinished product is subsequently annealed. Thereby, silicon atoms migrates to the Si grain nuclei on the amorphous silicon surface that is the component of the bottom electrode
3
a
. As the result, semispherical silicon grains silicon having the Si grain nucleus at the center namely HSG-Si
5
are formed on the surface of the bottom electrode
3
a
, and a wide surface area of the bottom electrode
3
a
is formed.
However, the method for forming a capacitor in which the bottom electrode is formed as described herein above is disadvantageous as described herein under.
In detail, organic substance that is generated during the process is deposited on the surface of the core pattern
2
a
formed on thee cylinder core layer
2
described with reference to FIG.
3
A. Such organic substance is taken into the core pattern
2
a
side surface layer of the amorphous silicon film
3
formed so as to cover the inside wall of the core pattern
2
a
. A natural oxide layer that has grown on the surface of the bottom electrode
3
a
is removed by means of etching of the bottom electrode
3
a
with diluted hydrofluoric acid, but amorphous silicon that is the component of the bottom electrode
3
a
and organic substance can not be removed by means of etching with diluted hydrofluoric acid. As the result, the surface layer of the bottom electrode
3
a
where organic substance has been taken in remains.
Because silicon atoms is prevented from migration on the surface layer (namely amorphous silicon) of the bottom electrode
3
a
where organic substance has been taken in, the growth of HSG-Si
5
is inhibited. Therefore, the growth of HSG-Si
5
is inhibited on the outer peripheral wall surface of the cylindrical bottom electrode
3
a
formed as described herein above, the sufficiently wide surface area of the bottom electrode
3
a
can not be obtained. Such circumstance inhibits the maximization of the capacitance.
SUMMARY OF THE INVENTION
It is the object of the present invention to provides a method for forming a capacitor having a cylindrical bottom electrode on which HSG-Si grows sufficiently on the entire exposed surface to maximize the capacitance.
The present invention has been accomplished to solve the above-mentioned problem, and the first method for forming a capacitor of the present invention involves successive steps as described herein under. In the first step an amorphous silicon film is formed so as to cover hole-type or island-type core pattern formed on a substrate. In the second step the amorphous silicon film is removed so that the amorphous silicon film remains on the side wall of the core pattern to thereby form a cylindrical bottom electrode having the peripheral wall that is the amorphous silicon film remaining on the side wall of the core pattern. In the third step the core pattern is removed by means of etching. In the fourth step the natural oxide film formed on the surface of the bottom electrode and the amorphous silicon surface layer that is the component of the bottom electrode are removed by means of etching. In the fifth step semispherical silicon grains are formed on the surface of the bottom electrode.
In the first method for forming a capacitor in accordance with the present invention, before semispherical silicon grains are formed on the surface of the bottom electrode, not only the natural oxide film on the bottom electrode surface but also the amorphous silicon surface layer that is the component of the bottom electrode is removed. Therefore, contaminant taken into the surface layer of the amorphous silicon film from the side wall of the core pattern is removed together with the amorphous silicon surface layer, and the exposed amorphous silicon surface of the bottom electrode is rendered free from contamination. As the result, the semispherical silicon grains grow sufficiently on the entire surface of the expose surface of the bottom electrode.
In the second method for forming a capacitor in accordance with the present invention, after the same first, second, and third steps as described in claim
1
are carried out to form a cylindrical bottom electrode, and then in the fourth step, the surface layer of the bottom electrode is etched with an aqueous mixture solution containing nitric acid and hydrofluoric acid. Subsequently, in the fifth step semispherical silicon grains are formed on the surface of the bottom electrode.
According to the second method for forming a capacitor in accordance with the present invention, before semispherical silicon grains are formed on the surface of the bottom electrode, the surface layer of the bottom electrode is etched with an aqueous mixture solution containing nitric acid and hydrofluoric acid. In this etching process, the natural oxide film formed on the surface of the bottom electrode is etching-removed with hydrofluoric acid, and the organic contaminant on the surface of the amorphous silicon film taken into from the side wall of the core pattern is etching-removed with nitric acid. Therefore, the exposed amorphous silicon surface of the bottom electrode is rendered free from contamination, and semispherical silicon grains grow sufficiently on the entire surface of the bottom electrode.
REFERENCES:
patent: 6355536 (2002-03-01), Figura et al.
patent: 6368913 (2002-04-01), Yamamoto
patent: 6413833 (2002-07-01), Yamamoto
patent: 6712077 (2004-03-01), Hirano et al.
patent: 09-036320 (1997-02-01), None
patent: 11-097641 (1999-04-01), None
patent: 11-238863 (1999-08-01), None
“A New Cylindrical Capacitor Using Hemispherical Grain
Hirano Tomoyuki
Iwamoto Hayato
Goudreau George A.
Sonnenschein Nath & Rosenthal LLP
Sony Corporation
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