Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-05-02
1998-10-27
Niebling, John
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438488, 438592, 438585, 438618, 438647, 438656, 438657, 438659, 438660, 438655, 438683, 438669, 438684, H01L 218238
Patent
active
058277625
ABSTRACT:
A buried interconnect structure which is stable at the high temperatures involved in BiCMOS, bipolar, and CMOS transistor process flows, and a method of making the same. The interconnect structure is fully insulated and can be used to form stable, doped structures suitable for use as electrodes and gate structures in a CMOS process, or to form low resistance contacts to N or P-type silicon as part of a bipolar process. Because the interconnect structure is buried and fully insulated from surrounding structures, it may be used to form complex, multi-level devices having a minimized geometry and increased circuit density.
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Bashir Rashid
Chen Datong
Hebert Francois
National Semiconductor Corporation
Niebling John
Pham Long
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