Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-10-28
2008-12-16
Sarkar, Asok K (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257SE21537, C257SE21644, C438S526000
Reexamination Certificate
active
07465632
ABSTRACT:
A method for forming a buried doped region is provided. A first insulating layer is formed on a substrate and the first insulating layer is patterned to from an opening that extends in a first direction. A buried doped region is formed in the substrate exposed by the opening. Thereafter, a second insulating layer is formed on the substrate to fill the opening. The second insulating layer together with the first insulation layer form a third insulating layer. The third insulating layer is patterned to form an isolation layer that exposes the substrate and the buried doped region. The isolation layer extends in a second direction and crosses over the first direction. A semiconductor layer is formed on the substrate to fill the areas on the respective sides of the isolation layer.
REFERENCES:
patent: 5028566 (1991-07-01), Lagendijk
patent: 6011272 (2000-01-01), Omid-Zohoor et al.
patent: 6716699 (2004-04-01), Cho et al.
patent: 6750098 (2004-06-01), Schlosser et al.
Chang Su-Yuan
Huang Chiu-Tsung
Jianq Chyun IP Office
Powerchip Semiconductor Corp.
Sarkar Asok K
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