Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1997-07-14
2000-05-23
Everhart, Caridad
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438614, 438615, H01L 21445
Patent
active
060665513
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF INVENTION
1. Technological Field
This invention relates to a method for forming a bump on pad electrodes of a flip-chip type semiconductor device.
2. Background Technology
On semiconductor devices that are bonded by means of the flip-chip method, solder bumps are formed on the pad electrodes. Conventional methods to form such solder bumps include metal evaporation, electrolytic plating, and/or stud-bumping. However, each of the first or third method has its own disadvantages: metal evaporation is inferior in precision in terms of recent larger wafer sizes, finer bump pitches and more complicated and dense bump shapes; and stud-bumping is expensive for mass-production so it is only used for experimental products. Therefore, electrolytic plating is becoming the major method for bump formation aimed at volume production.
FIG. 17 shows a conventional bump formed by electrolytic plating.
In the figure, 1 is a wafer; 2 a pad electrode made of aluminum; 3 a passivation film; 100 an electrolytic plating bump; 101 an undercoat metallic film; 102 a copper core; and 103 a solder bump.
In order to form this bump, the undercoat metallic film 101 is formed by evaporating aluminum, chrome, and copper onto the wafer 1 using a vacuum metal evaporation method, in order to ascertain the reliability of the pad electrode of the semiconductor device and the electrolytic connectivity. Then, plating resist is applied, and an appropriate part of the plating resist is opened to expose the undercoat metallic film 101 on the pad electrode 2. Copper is electrolytically plated using the undercoat metallic film 101 as the common electrode to form the copper core 102. Solder is also electrolytically plated. Next, the plating resist is removed, leaving the undercoat metallic film 101 in the bump portion, and the other portion of the undercoat metallic film is etched. Finally, after applying a flux, the solder is melted in a reflow furnace under a nitrogen atmosphere to complete the plating bump 100.
However, this method for forming solder bumps also has problems as follows.
First, it incurs high cost and is inflexible. Since equipment used in steps for forming photoresist and/or undercoat metallic film is expensive and the wafer sizes that can be handled are limited, it takes time for switching when the wafer size is changed, or sizes out of specification can not be handled. Thus, this method leads to high costs, and it is impossible to form bumps on chips rather than on wafers.
The second problem is reliability. When solder bumps are bonded to the substrate, it is necessary to plate a copper core, which is approximately 20 .mu.m in thickness, in order to prevent solder bumps from being crushed and causing a short with the side of the semiconductor device. Copper is a hard material and adheres strongly to the undercoat metallic film. Hence, as chip sizes become larger, there are reliability problems such as discontinuity caused by peeling of the surface, cracked silicon, and so on, which are caused by stress under the copper core due to the different coefficients of linear expansion of copper and silicon substrate when thermal variations occur due to heating or cooling.
Third, etching of the undercoat metallic film is a difficult step. When aluminum, chrome, or copper is used as the undercoat metal, for example, it has been difficult to etch the undercoat metallic film without etching lead and tin. Also, it is difficult to control the amount and time of etching.
Meanwhile, a technique, in which solder is applied to leads of electronic parts or exposed patterns on a printed circuit board, has been suggested (see Japanese Patent Application Laid-Open No.074459/1995).
A similar technology, applying this technique, has not be developed to form bumps on pad electrodes on semiconductor devices. Furthermore, no information has been disclosed regarding a method to prevent bumps from being crushed while the bumps are bonded onto the substrate when forming a bump by means of this technique.
The objective of this invention is therefor
Ishida Yoshihiro
Satou Tetsuo
Citizen Watch Co. Ltd.
Everhart Caridad
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