Method for forming an on-chip high frequency electro-static...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S622000, C438S638000, C438S508000, C438S508000

Reexamination Certificate

active

07915158

ABSTRACT:
A method for forming an on-chip high frequency electro-static discharge device is described. In one embodiment, a wafer with a multi-metal level wiring is provided. The wafer includes a first dielectric layer with more than one electrode formed therein, a second dielectric layer disposed over the first dielectric layer with more than one electrode formed therein and more than one via connecting the more than one electrode in the first dielectric layer to a respective more than one electrode in the second dielectric layer. The more than one via is misaligned a predetermined amount with the more than one electrodes in the first dielectric layer and the second dielectric layer. The at least one of the misaligned vias forms a narrow gap with another misaligned via. A cavity trench is formed through the second dielectric layer between the narrow gap that separates the misaligned vias.

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Ding et al., U.S. Appl. No. 12/144,089, filed Jun. 23, 2008, Notice of Allowance and Fee(s) Due dated Mar. 10, 2010, 11 pages.
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