Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-04-21
1999-08-10
Trinh, Michael
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438300, 438307, 438529, 438592, H01L 21336
Patent
active
059372990
ABSTRACT:
An IGFET with source and drain contacts in close proximity to a gate with sloped sidewalls is disclosed. A method of making the IGFET includes forming a gate over a semiconductor substrate, wherein the gate includes a top surface, a bottom surface and opposing sidewalls, and the top surface has a substantially greater length than the bottom surface, forming a source and a drain that extend into the substrate, depositing a contact material over the gate, source and drain, and forming a gate contact on the gate, a source contact on the source, and a drain contact on the drain. The gate is separated from the source and drain contacts due to a retrograde slope of the gate sidewalls, and the gate contact is separated from the source and drain contacts due to a lack of step coverage in the contact material. Preferably, the contact material is a refractory metal, and the contacts are formed by converting the refractory metal into a silicide. In this manner, a highly miniaturized IGFET can be provided with densely-packed gate, source and drain contacts without the need for sidewall spacers adjacent to the gate.
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Dawson Robert
Fulford Jr. H. Jim
Gardner Mark I.
Hause Frederick N.
Michael Mark W.
Advanced Micro Devices , Inc.
Holloway William W.
Trinh Michael
LandOfFree
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