Method for forming a top oxide with nitride liner

Details Method for forming a top oxide with nitride liner Method for forming a top oxide with nitride liner

2006-07-18

2006-07-18

Smoot, Stephen W. (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S268000, C438S391000

Reexamination Certificate

active

07078290

ABSTRACT:
A method for forming a top oxide for a deep trench memory device comprising a poly stud above a polysilicon fill in a deep trench and an isolation region in a portion of the deep trench, comprises forming an etch support nitride liner by low-pressure chemical vapor deposition over the poly stud, and forming a support polysilicon over a portion of the isolation trench outside of an array. The method further comprises depositing a top oxide over the deep trench memory device, forming a planarization coating over the top oxide, and opening the nitride stud, wherein the top oxide remains over a portion of the isolation trench.

REFERENCES:
patent: 6063658 (2000-05-01), Horak et al.
patent: 6236079 (2001-05-01), Nitayama et al.
patent: 6537870 (2003-03-01), Shen
patent: 6620699 (2003-09-01), Scholz et al.
patent: 2002/0196651 (2002-12-01), Weis
patent: 2005/0070108 (2005-03-01), Divakaruni et al.

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