Method for forming a stable semiconductor device having an arsen

Details Method for forming a stable semiconductor device having an arsen Method for forming a stable semiconductor device having an arsen

1995-01-31

1997-05-20

Niebling, John

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438201, 438258, 438585, 438301, 438719, H01L 21265, H01L 2170, H01L 2700

Patent

active

056311788

ABSTRACT:
A method for making stable arsenic doped semiconductor devices (11,53,56) using dry etching techniques includes forming a polycrystalline semiconductor layer (29) on a upper surface of a semiconductor substrate (12), and patterning the polycrystalline semiconductor layer (29) using a dry etch process such as a plasma etch process. The semiconductor substrate (12) is then exposed to an elevated temperature to substantially reduce any defects contiguous with the upper surface of semiconductor substrate (12) resulting from the dry etch process. Arsenic is then incorporated into the semiconductor substrate (12) to form N+ regions (44). Surface sensitive devices such as MOSFET devices (53,56) are then formed on or within the semiconductor substrate (12).

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Damon DeBusk, SPV Testing--A Real-Time Contamination Monitoring Technique, Apr. 1993, Semiconductor International, pp. 66-68.

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