Method for forming a resistor load of a static random access mem

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438238, 438200, 438355, H01L 218234

Patent

active

060717696

ABSTRACT:
A method for manufacturing SRAM loads comprising the steps of sequentially forming a silicon oxide layer and a silicon nitride layer over a polysilicon layer. Then, the silicon oxide layer and the silicon nitride layer are patterned to form vias exposing a load region. Thereafter, using a thermal oxidation operation, an oxide layer is formed above the load region. Subsequently, the silicon nitride layer and the silicon oxide layer are removed. Through the formation of an oxide layer over the load region, the cross-sectional thickness and width of the load are reduced, thereby moderating the out-diffusion of ions while maintaining the load resistance. Furthermore, the oxide layer, which forms over the load region in the back-end process, can serve as a barrier layer preventing the out-diffusion of ions and blocking incoming moisture.

REFERENCES:
patent: 5719079 (1998-02-01), Yoo
patent: 5770496 (1998-06-01), Roberts
patent: 5866451 (1999-02-01), You et al.

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