Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-07-18
2006-07-18
Chen, Jack (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S183000, C438S585000
Reexamination Certificate
active
07078284
ABSTRACT:
Methods for forming notched gates and semiconductor devices utilizing the notched gates are provided. The methods utilize the formation of a dummy gate on a substrate. The dummy gate is etched to form notches in the dummy gate, and sidewall spacers are formed on the sidewalls of the notched dummy gate. The dummy gate is removed, and a notched gate is formed. The methods allow the height and depth of the notches to be independently controlled, and transistors having shorter channel lengths are formed.
REFERENCES:
patent: 4430792 (1984-02-01), Temple
patent: 4845534 (1989-07-01), Fukuta
patent: 5545578 (1996-08-01), Park et al.
patent: 5834817 (1998-11-01), Satoh et al.
patent: 6060358 (2000-05-01), Bracchitta et al.
patent: 6121666 (2000-09-01), Burr
patent: 6127232 (2000-10-01), Chatterjee et al.
patent: 6180978 (2001-01-01), Chatterjee et al.
patent: 6204133 (2001-03-01), Yu et al.
patent: 6306715 (2001-10-01), Chan et al.
patent: 6337262 (2002-01-01), Pradeep et al.
patent: 6451639 (2002-09-01), Jang et al.
patent: 2002/0000623 (2002-01-01), Cho et al.
patent: WO 00/34984 (2000-06-01), None
Chen Jack
Dinsmore & Shohl LLP
Micro)n Technology, Inc.
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