Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-01-04
2000-04-25
Fourson, George
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
H01L 218242
Patent
active
060543477
ABSTRACT:
A process for creating a modified crown shaped storage node electrode, for a DRAM capacitor structure, featuring increased surface area resulting via the addition of a silicon hill, to the conventional crown shaped structure, has been developed. A thin, narrow insulator shape, is formed, between two wider, thicker insulator shapes. After deposition of a polysilicon layer, a chemical mechanical polishing procedure is used to form the modified crown shaped storage node electrode, via removal of polysilicon from the top surface of the two wider, thicker insulator shapes, while the polysilicon layer, traversing the thin, narrow insulator shape, is not removed. The thin, narrow insulator shape had been previously formed during an anisotropic RIE procedure, using a photoresist shape as an etch mask, with the photoresist shape, being narrower and thinner than counterpart photoresist shapes, used as an etch mask for patterning of the two wider, thicker insulator shapes.
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Ackerman Stephen B.
Fourson George
Garcia Joannie A.
Saile George O.
Vanguard International Semiconductor Corporation
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