Method for forming a metal silicide layer in a semiconductor...

Details Method for forming a metal silicide layer in a semiconductor... Method for forming a metal silicide layer in a semiconductor...

2006-02-28

2006-02-28

Sarkar, Asok Kumar (Department: 2891)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

Reexamination Certificate

active

07005373

ABSTRACT:
On first and second regions of a substrate are formed a first gate structure including a first gate electrode and a first spacer, and a second gate structure including a second gate electrode and a second spacer, respectively. The first and second spacers are removed to different depths such that side portions of the first and second gate electrodes have different exposed thicknesses. A metal silicide layer is formed on the first and second regions including the first and second gate structures. The metal silicide layer formed on the second gate electrode has a second thickness that is greater than a first thickness of the metal silicide layer formed on the first gate electrode. The spacers in the gate structures of resulting N type and P type MOS transistors are removed to different thicknesses, thereby minimizing deformation in the gate structures and also improving electrical characteristics and thermal stability of the gate electrodes.

REFERENCES:
patent: 6103610 (2000-08-01), Blair
patent: 6344388 (2002-02-01), Oishi et al.
patent: 6391750 (2002-05-01), Chen et al.

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