Method for forming a metal silicide layer in a semiconductor...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C257SE21439

Reexamination Certificate

active

07375025

ABSTRACT:
On first and second regions of a substrate are formed a first gate structure including a first gate electrode and a first spacer, and a second gate structure including a second gate electrode and a second spacer, respectively. The first and second spacers are removed to different depths such that side portions of the first and second gate electrodes have different exposed thicknesses. A metal silicide layer is formed on the first and second regions including the first and second gate structures. The metal silicide layer formed on the second gate electrode has a second thickness that is greater than a first thickness of the metal silicide layer formed on the first gate electrode. The spacers in the gate structures of resulting N type and P type MOS transistors are removed to different thicknesses, thereby minimizing deformation in the gate structures and also improving electrical characteristics and thermal stability of the gate electrodes.

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patent: 6391750 (2002-05-01), Chen et al.
patent: 6600212 (2003-07-01), Takayanagi et al.
patent: 6642094 (2003-11-01), Rotondaro et al.
patent: 6894353 (2005-05-01), Samavedam et al.
patent: 2004/0075133 (2004-04-01), Nakagawa et al.
patent: 2000-196071 (2000-07-01), None

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