Method for forming a high surface area capacitor electrode for D

Details Method for forming a high surface area capacitor electrode for D Method for forming a high surface area capacitor electrode for D

1999-05-07

2000-09-05

Smith, Matthew

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438253, 438255, 438398, 438964, 257309, 257915, H01L 218242, H01L 2120, H01L 27108, H01L 2912

Patent

active

061141984

ABSTRACT:
A process for creating a capacitor structure, for a DRAM device, in which the capacitance has been increased via use of a high dielectric constant capacitor dielectric layer, and via the use of a storage node electrode, comprised of a top surface HSG layer, has been developed. The process features deposition of an HSG TiN layer, used as part of a storage node structure, resulting in an increase in storage node electrode surface area, and thus an increase in capacitance.

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patent: 5998870 (1999-12-01), Lee et al.

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