Method for forming a high areal capacitance planar capacitor

Details Method for forming a high areal capacitance planar capacitor Method for forming a high areal capacitance planar capacitor

1996-03-11

1999-01-12

Chang, Joni

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438253, H01L 218242

Patent

active

058588329

ABSTRACT:
A method for forming within an integrated circuit a high areal capacitance planar capacitor, and the high areal capacitance planar capacitor which results from the method. There is first formed upon a semiconductor substrate a first planar capacitor electrode. The first planar capacitor electrode has a first planar capacitor dielectric layer formed thereupon, and the first planar capacitor dielectric layer has a second planar capacitor electrode formed thereupon. Formed then upon the semiconductor substrate is a Pre-Metal Dielectric (PMD) layer which is planarized until the surface of the second planar capacitor electrode is fully exposed. There is formed upon the second planar capacitor electrode a second planar capacitor dielectric layer. Finally, there is formed upon the second planar capacitor dielectric layer a third planar capacitor electrode. The high areal capacitance areal capacitor may be formed within the integrated circuit without masking steps beyond those which are routinely employed in forming the integrated circuit.

REFERENCES:
patent: 4700457 (1987-10-01), Matsukawa
patent: 4985718 (1991-01-01), Ishijima
patent: 4990463 (1991-02-01), Mori
patent: 5006481 (1991-04-01), Chan et al.
patent: 5262354 (1993-11-01), Cote et al.
patent: 5312512 (1994-05-01), Allman et al.

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