Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – By reaction with substrate
Reexamination Certificate
1998-10-02
2001-07-03
Chaudhuri, Olik (Department: 2814)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
By reaction with substrate
Reexamination Certificate
active
06255231
ABSTRACT:
FIELD OF THE INVENTION
The present invention is generally related to a method and apparatus for forming an oxide layer on an electronic substrate and more particularly, is related to a method and apparatus for forming a thin gate oxide layer on a silicon wafer that has improved process control capability such that a precise thickness of the oxide layer can be obtained.
BACKGROUND OF THE INVENTION
In the semiconductor fabrication process, one of the more important processing steps is the formation of a gate oxide layer for insulating a gate structure on a silicon substrate. Generally, silicon dioxide layers can be grown in a temperature range between 400° C. and 1150° C. The growth process can be carried out in resistance-heated furnaces or in rapid-thermal process chambers with heat provided by, for instance, tungsten-halogen lamps. Typically, either a horizontal or a vertical furnace tube can be used for such purpose. After a batch of wafers is first loaded into a furnace either in a horizontal or in a vertical position, the furnace is heated (or ramped-up) to an oxidation temperature of silicon. The wafers are held at the elevated temperature for an extended length of time and then brought back (or ramped-down) to a low temperature.
The silicon dioxide layers can be grown in either a dry oxidation process or a wet oxidation process. In a dry oxidation process, oxygen mixed with an inert carrier gas such as nitrogen is passed over the wafers at an elevated temperature. In a wet oxidation process, the process can be carried out by bubbling oxygen through a high purity water that is maintained at a temperature of approximately 90° C. The temperature of the water bath determines the partial pressure of water vapor in the oxygen gas stream. The water vapor/oxygen gas mixture is then passed over the batch of wafers maintained at a preset elevated temperature. The wet oxidation process may also be carried out in a pyrogenic steam oxidation process in which the oxidizing medium is water vapor formed by a direct reaction between hydrogen and oxygen. A typical pyrogenic steam oxidation apparatus
10
is shown in FIG.
1
.
As shown in
FIG. 1
, a typical pyrogenic steam oxidation process can be carried out in a horizontal furnace tube
12
which is situated in a furnace
14
. Inside the furnace tube
12
, a wafer bolt
16
is used to hold a batch of wafers
20
in an upright position. Oxygen gas
22
is fed into the furnace tube
12
by a carrier inert gas
24
(such as nitrogen) through an inlet
26
. A separate flow
28
of hydrogen is fed into the furnace tube at another inlet
30
. Water vapor is thus formed by a direct reaction between hydrogen and oxygen in the furnace tube
12
as an oxidizing medium to produce silicon dioxide on the silicon wafers
20
. Unused water vapor and other reaction by-products are flown out of the furnace tube
12
through outlet
32
.
The thermal budget required to achieve an oxide film of a certain thickness is considerably smaller in a wet oxidation process than in a dry oxidation process. Since the smallest fabricated dimension in a semiconductor device is frequently the gate-oxide thickness, the process control of a pyrogenic steam oxidation method is more difficult than that of a dry oxidation method. For instance, in a 0.35 &mgr;m device, a 70 Å gate oxide thickness must be controlled to within 7 Å in order to meet stringent reliability requirements, i.e., one of such requirements is a defect density of smaller than 0.5/cm
2
. A process that manufactures devices that have ultra-thin oxide layers therefore requires careful process control and oxidation-furnace optimization. As the diameter of silicon wafers becomes larger, i.e., increased from 150 mm to 200 mm or 300 mm diameter, larger furnace tubes must be utilized which further complicates the ambient control process. Furthermore, as device dimensions are further reduced to the sub 0.25 &mgr;m level, the thickness of the gate oxide layers is also reduced to about 50 Å. An ultra-thin gate oxide layer of 50 Å is very difficult to control when it is grown in a pyrogenic steam oxidation process such as that shown in FIG.
1
. One major reason for such difficulty is simply that the pyro-time required for depositing such ultra-thin layer of oxide is too short. Another reason for such difficulty is a higher than normal annealing temperature used on the ultra-thin oxide layers which is necessary to obtain high quality oxide material. The annealing process is normally conducted at a temperature of about 1000° C. At such high temperature, any residual moisture in the reaction chamber or in a conduit leading to the reaction chamber may cause to further oxide growth on the wafers and thus throwing the oxide thickness out of specification.
The process control difficulty occurring in an ultra-thin oxide deposition process can be illustrated in FIG.
2
. The oxide thickness as deposited on silicon wafers in a vertical oxidation chamber are monitored and plotted during a two-months period. In
FIG. 2
, the notations of U, C and L denote wafer samples situated in an upper part of the furnace tube, in a center part of the furnace tube or in a lower part of the furnace tube. It is seen that while the pyrolysis time is maintained substantially constant, the oxide thicknesses vary greatly between about 40 Å and about 80 Å during the two-months monitoring period. Such fluctuation in the thicknesses of ultra-thin gate oxide layers cannot be tolerated. For instance, a maximum allowable deviation from a nominal thickness is well within 10%.
It is therefore an object of the present invention to provide a method for forming an oxide layer on an electronic substrate that does not have the drawbacks or shortcomings of the conventional methods.
It is another object of the present invention to provide an apparatus for forming an oxide layer on a silicon substrate that does not have the drawbacks or shortcomings of the conventional apparatus.
It is a further object of the present invention to provide a method for forming a thin oxide layer on a silicon wafer which has improved process control.
It is another further object of the present invention to provide a method for forming a thin gate oxide layer on a silicon wafer wherein the thickness of the oxide layer can be controlled to within 10% deviation.
It is still another object of the present invention to provide a method for forming an ultra-thin oxide layer on a silicon wafer by utilizing a sub-heater in combination with a primary heater for heating a moisture generator.
It is yet another object of the present invention to provide a method for forming an ultra-thin oxide layer on a silicon wafer by continuously heating a moisture generator after flows of hydrogen and oxygen into the generator have been stopped.
It is still another further object of the present invention to provide a method for forming an ultra-thin gate oxide layer on a silicon wafer by purging a flow of nitrogen that is substantially without moisture into an oxidation chamber during a high temperature annealing process for the gate oxide layer.
It is yet another further object of the present invention to provide a method for forming an ultra-thin gate oxide layer on a silicon wafer by continuously heating a moisture generator after flows of hydrogen and oxygen into the generator have been stopped and purging a substantially dry nitrogen gas through an oxidation chamber during a high temperature annealing process for the ultra-thin gate oxide layer.
It is still another further object of the present invention to provide an apparatus for forming a ultra-thin gate oxide layer on a silicon wafer that is equipped with a sub-heater on a moisture generator and a nitrogen purge gas inlet that is situated immediately adjacent to an oxidation chamber which enables a substantially moisture-free purge gas to be flown through the oxidation chamber during a high temperature annealing process.
SUMMARY OF THE INVENTION
In accordance with the present invention, a method for forming an
Chen B. F.
Lin F. Y.
Lin W. J.
Chaudhuri Olik
Peralta Ginette
Taiwan Semiconductor Manufacturing Co. Ltd
Tung & Associates
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