Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-11-17
2000-12-12
Bowers, Charles
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438593, H01L 21336
Patent
active
061597988
ABSTRACT:
A method for forming a floating gate of a non-volatile memory device includes steps of defining a substrate, forming a plurality of field isolation structures within the substrate, planarizing the substrate that includes the plurality of field isolation structures, and growing a first dielectric layer on the substrate. The method also includes steps of depositing a polysilicon layer over the first dielectric layer, chemical mechanical polishing the polysilicon layer with an oxide etchant to achieve local planarization, growing a second dielectric layer over the planarized polysilicon layer, depositing a third dielectric layer over the second dielectric layer, forming a fourth dielectric layer over the third dielectric layer, and patterning and forming a floating gate in the polysilicon layer.
REFERENCES:
patent: 4613956 (1986-09-01), Paterson et al.
patent: 5704987 (1998-01-01), Huynh et al.
patent: 5780891 (1998-07-01), Kauffman et al.
S. Ghandhi, VLSI Fabrication Principles: Silicon and Gallium Arsenide, 1983, John Wiley & Sons, p. 522.
Bowers Charles
Pert Evan
Winbond Electronics Corporation
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