Method for forming a fine pattern in a semiconductor device

Details Method for forming a fine pattern in a semiconductor device Method for forming a fine pattern in a semiconductor device

1999-04-20

2000-12-05

Powell, William

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

134 12, 216 62, 438705, 438734, H01L 2100

Patent

active

061566683

ABSTRACT:
A method for forming a fine pattern in a semiconductor device removes roughness from a pattern produced in a fine pattern fabrication process using a silylation process as being one kind of a TSI process, eliminates smoothly a photosensitive film residue caused by a residue silylation layer remained on a-non-pattern area, and increases a margin of a lithography process. To achieve the foregoing, the method performs an etching process with a fluorine/oxygen mixture gas so as to remove a thin oxide film being formed on the non-pattern area after a silylation process, enables an edge portion of a silylation region to be planarized so as to prevent the pattern from becoming rough, and forms a photosensitive film pattern by developing the photosensitive film with oxygen plasma. Thereafter, the photosensitive film residue is etched again with a mixture gas of fluorine/oxygen, thereby increasing a fabrication margin of the fine pattern.

REFERENCES:
patent: 5356478 (1994-10-01), Chen et al.
patent: 5382316 (1995-01-01), Hills et al.
patent: 5525192 (1996-06-01), Lee et al.
patent: 6001739 (1999-12-01), Konishi

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