Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2003-07-11
2004-09-28
Thai, Luan (Department: 2827)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S240000, C438S591000, C438S785000
Reexamination Certificate
active
06797572
ABSTRACT:
TECHNICAL FIELD
The present invention is generally in the field of semiconductor devices. More particularly, the present invention is in the field of fabrication of field effect transistors.
BACKGROUND ART
As field effect transistors (“FET”), such as metal-oxide semiconductor FETs (“MOSFET”), are scaled down in size, semiconductor manufactures have utilized gate dielectrics having a high dielectric constant (“high-k”) to improve FET performance and reliability. High-k gate dielectrics are desirable in small feature size technologies since conventional gate dielectrics, such as silicon dioxide (“SiO
2
”), are too thin and they result in high tunneling current, as well as other problems, which decrease performance and reliability of FETs. High-k dielectrics, such as hafnium oxide (“HfO”) and zirconium oxide (“ZrO”), have a dielectric constant equal to approximately 24, while SiO
2
has a dielectric constant equal to approximately 4. As a result, the equivalent oxide thickness (“EOT”) for HfO and ZrO is approximately ⅙ of the thickness of SiO
2
. By way of background, “EOT” refers to the thickness of any dielectric scaled by the ratio of its dielectric constant to the dielectric constant of SiO
2
. Thus, by utilizing high-k gate dielectrics, semiconductor manufactures can achieve FETs having desirably thin gate dielectrics having a thickness that is equivalent to a much greater thickness of SiO
2
. However, conventional processes for fabricating FETs having high-k gate dielectrics can cause an undesirable increase in interfacial oxide thickness and carrier mobility degradation in the channel region.
In a conventional process for fabricating a FET having a high-k dielectric, a high-k dielectric, such as HfO or ZrO, is formed over a channel region of a silicon substrate. The high-k dielectric comprises a high-k element, such as Hf or Zr, which is combined with oxygen. However, excessive oxygen from the high-k dielectric combines with silicon on the surface of the silicon substrate to form a low-quality interfacial oxide layer between the silicon substrate and the high-k dielectric. The resulting low-quality interfacial oxide layer causes an undesirable increase in thickness of the gate dielectric, which includes the high-k dielectric and the low-quality interfacial oxide layer. Additionally, the high-k element in the high-k gate dielectric can diffuse into the channel region and, thereby, cause undesirable carrier mobility degradation.
Thus, there is a need in the art for a method for fabricating a high-k gate dielectric in a field effect transistor without causing an undesirable increase in gate dielectric thickness or carrier mobility degradation.
SUMMARY
The present invention is directed to method for forming a field effect transistor having a high-k gate dielectric and related structure. The present invention addresses and resolves the need in the art for a method for fabricating a high-k gate dielectric in a field effect transistor without causing an undesirable increase in gate dielectric thickness or carrier mobility degradation.
According to one exemplary embodiment, a method for forming a field effect transistor over a substrate comprises a step of forming an interfacial oxide layer over a channel region of the substrate, where the interfacial oxide layer has a first thickness. The interfacial oxide layer can prevent a high-k element from diffusing into the channel region. The first thickness of the interfacial oxide layer may be, for example, between approximately 4.0 Angstroms and approximately 5.0 Angstroms.
According to this exemplary embodiment, the method further comprises forming an oxygen-attracting layer over the interfacial oxide layer, where the oxygen-attracting layer prevents the first thickness of the interfacial oxide layer from increasing. The oxygen-attracting layer is formed by forming a metal layer over the interfacial oxide layer, where the metal layer combines with oxygen to form a silicate. The oxygen-attracting layer may be zirconium silicate or hafnium silicate and can have a thickness of approximately 5.0 Angstroms, for example. The method further comprises forming a high-k dielectric layer over the oxygen-attracting layer. The high-k dielectric layer may be, for example, hafnium oxide, hafnium silicate, zirconium silicate, or zirconium oxide. The method further comprises forming a gate electrode layer over the high-k dielectric layer. In one embodiment, the invention is a field effect transistor fabricated by utilizing the above-discussed method. Other features and advantages of the present invention will become more readily apparent to those of ordinary skill in the art after reviewing the following detailed description and accompanying drawings.
REFERENCES:
patent: 6703277 (2004-03-01), Paton et al.
Jeon Joong S
Zhong Huicai
Advanced Micro Devices , Inc.
Farjami & Farjami LLP
Thai Luan
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