Method for forming a DRAM having improved capacitor dielectric l

Details Method for forming a DRAM having improved capacitor dielectric l Method for forming a DRAM having improved capacitor dielectric l

1998-06-02

2000-06-20

Nguyen, Tuan H.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438253, 438709, 438723, H01L 218242

Patent

active

060777370

ABSTRACT:
A method of fabricating a DRAM device having nitride/oxide or tantalum pentoxide dielectric layers. The method includes: forming field oxide regions on a substrate to define active regions; forming at each active region a MOSFET comprising a top dielectric layer; forming a contact window in the MOSFET top dielectric layer; generating a doped poly-Si bottom electrode of a capacitor in electrical connection with the MOSFET through the contact window; removing surface oxide of the bottom electrode using both chemical and inductive coupled plasma (ICP) treatments; depositing nitride/oxide dielectric layers or a tantalum pentoxide dielectric layer on the ICP-treated bottom electrode; generating a doped poly-Si top electrode of the capacitor.

REFERENCES:
patent: 5403434 (1995-04-01), Moslehi
patent: 5442585 (1995-08-01), Eguchi et al.
patent: 5741722 (1998-04-01), Lee
patent: 5824158 (1998-10-01), Takeuchi et al.
patent: 5837615 (1998-11-01), Rostoker

Affiliated with

Also associated with

Rating

Method for forming a DRAM having improved capacitor dielectric l does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for forming a DRAM having improved capacitor dielectric l, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for forming a DRAM having improved capacitor dielectric l will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1851317