Method for forming a DRAM capacitor with rounded horizontal fins

Details Method for forming a DRAM capacitor with rounded horizontal fins Method for forming a DRAM capacitor with rounded horizontal fins

1996-10-28

1998-10-20

Tsai, Jey

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438254, H01L 218242

Patent

active

058245812

ABSTRACT:
An improved method for forming a dynamic random access memory (DRAM) capacitor includes forming a first dielectric layer on a substrate. The first dielectric layer is patterned and anisotropically etched to form a trench that defines a storage node area. A doped polysilicon layer is formed on the first dielectric layer and filling the trench. Next, a nitride layer is formed on the doped polysilicon layer and a dielectric stack is then formed over the nitride layer. The dielectric stack includes alternating layers of a second dielectric material and a third dielectric material, each dielectric material having a different etch rate. The dielectric stack is patterned and anisotropically etched to form a laminated pillar. The pillar is then isotropically etched to form recessed cavities in a sidewall of the pillar. Portions of the nitride layer are then removed using the pillar as a mask, and a doped polysilicon layer is conformally formed over the pillar so as to fill the recessed cavities. Afterwards, portions of the doped polysilicon layer are removed to expose the upper surface of the pillar, and the pillar is removed while leaving the residual doped polysilicon layer intact, thereby forming an electrode of the capacitor of the DRAM cell.

REFERENCES:
patent: 5170233 (1992-12-01), Liu
patent: 5436186 (1995-07-01), Hsue et al.
patent: 5545585 (1996-08-01), Wang et al.
patent: 5550077 (1996-08-01), Tseng et al.
patent: 5656536 (1997-08-01), Wu

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