Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-12-03
1999-08-17
Chaudhari, Chandra
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438657, H01L 218242
Patent
active
059407018
ABSTRACT:
A method for forming a capacitor of a dynamic random access memory cell is disclosed. The method includes patterning a first polysilicon layer (124) over a semiconductor substrate, wherein at least a portion of the first polysilicon layer is communicated to the substrate. An anti-oxidation layer (125) is formed on the first polysilicon layer, wherein a portion of the first polysilicon layer is exposed. The first polysilicon layer is then thermally oxidized using the anti-oxidation layer as a mask, thereby forming poly-oxide (128) on sidewalls and the exposed surface of the first polysilicon layer. A portion of the first polysilicon layer is etched using the poly-oxide as an etch mask, thereby forming a trench in the first polysilicon. Thereafter, a pair of inner dielectric spacers (130A) is formed on inner sidewalls of the trench, and a pair of outer dielectric spacers (130B) on outer sidewalls of the poly-oxide. A pair of inner polysilicon spacers (132A) is formed on inner sidewalls of the inner dielectric spacers, and a pair of outer polysilicon spacers (132B) on outer sidewalls of the outer dielectric spacers. The inner dielectric spacers, the dielectric spacers, and a portion of the first polysilicon layer are removed, whereby lifting off the pair of outer polysilicon spacers. Finally, a dielectric layer (136) is formed on the first polysilicon layer, and the pair of inner polysilicon spacers, and then a conductive layer (138) is then formed on the dielectric layer.
REFERENCES:
patent: 5604146 (1997-02-01), Tseng
patent: 5807775 (1998-09-01), Tseng
patent: 5811331 (1998-09-01), Ying et al.
Chaudhari Chandra
Vanguard International Semiconductor Corporation
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