Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-05-24
2000-12-19
Niebling, John F.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438253, 438396, 438397, H01L 218242, H01L 2120
Patent
active
061626805
ABSTRACT:
The method for forming a capacitor in the present invention includes the steps as follows. At first, a multi-layer structure is formed on a semiconductor substrate, and the multi-layer structure is provided to have etching selectivity in etching neighboring layers in the multi-layer structure. A top dielectric layer is then formed on the multi-layer structure. A first opening is defined in the top dielectric layer, and a second opening is defined in the multi-layer structure under the first opening. Next, a wet etch is performed through the second opening to form at least two lateral openings in the multi-layer structure. Following the wet etch, a first conductive layer is formed conformably on the top dielectric layer, on sidewalls of the first opening and the second opening, and filled within the at least two lateral openings. A filling layer is then formed on the substrate, and the filling layer and the first conductive layer on the top dielectric layer are removed. The remained filling layer, the top dielectric layer, and the multi-layer structure are removed to leave a first electrode on the substrate. Finally, an inter-electrode dielectric layer is formed on the first electrode and a second conductive layer is formed on the inter-electrode dielectric layer to finish the formation of a capacitor.
REFERENCES:
patent: 5240871 (1993-08-01), Doan et al.
patent: 5545585 (1996-08-01), Wang et al.
patent: 5817555 (1998-10-01), Cho
patent: 5851876 (1998-12-01), Jenq
patent: 5907774 (1999-05-01), Wise
patent: 6064085 (2000-05-01), Wu
Kennedy Jennifer M.
Niebling John F.
Worldwide Semiconductor Manufacturing Corp.
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