Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-06-24
1998-09-15
Chang, Joni
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438254, 438397, H01L 218242
Patent
active
058077758
ABSTRACT:
A method for manufacturing a double walled cylindrical stacked capacitor for a DRAM using only one photo mask is provided. An insulating layer having a contact opening is formed over a transistor. A first conductive layer is then formed over the insulating layer. The first conductive layer is patterned forming a central spine over the contact opening and portions of the first conductive layer are left covering the insulation layer. Dielectric spacers are formed on the sidewall of the central spine. The remaining portions of the first conductive layer over the first insulating layer are removed and upper portions of the central spine are removed forming a conductive base. Inner and outer conductive walls are formed on the sidewalls of the dielectric spacers thereby forming a double walled bottom electrode. The dielectric spacers are removed. A capacitor dielectric layer and a top electrode are formed over the bottom electrode forming the capacitor. The invention uses sidewall spacers and selective etching techniques to forms a low cost, simple to manufacture, high capacitance capacitor and DRAM cell.
REFERENCES:
patent: 5266512 (1993-11-01), Kirsch
patent: 5274258 (1993-12-01), Ahn
patent: 5389568 (1995-02-01), Yun
patent: 5443993 (1995-08-01), Park et al.
patent: 5476806 (1995-12-01), Roh et al.
Ackerman Stephen B.
Chang Joni
Saile George O.
Stoffel William J.
Vanguard International Semiconductor Corporation
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