Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-12-22
1999-08-31
Brown, Peter Toby
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438199, 438200, 438229, 257328, 257355, 257356, 257357, H01L 218234
Patent
active
059465743
ABSTRACT:
A method for forming a protection circuit that starts with forming a first-type well and a second-type well on a first-type substrate. By forming isolations, a first active region is defined within the second-type well, and a second active region, a third active region and a fourth active region are defined within the first-type well. A first polysilicon layer is formed on the substrate and patterned to expose the third and the fourth active regions. A second polysilicon layer is formed on the substrate and patterned into a first gate that connects the first and the third active regions, and a second gate that connects the second and the fourth active regions. Then, by performing a first-type implantation process, the first gate is turned into a first-type gate. First-type source/drain regions are formed in the first active region, and first-type contacts are formed in the third active region as well. Similarly, the second gate is turned into a second-type gate, second-type source/drain regions are formed in the second active region, and second-type contacts are formed in the fourth active region by performing a second-type implantation process.
REFERENCES:
patent: 5516717 (1996-05-01), Hsu
patent: 5591661 (1997-01-01), Shiota
Brown Peter Toby
Pham Long
United Microelectronics Corp.
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