Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-07-22
1999-06-22
Mulpuri, Savitri
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438303, 438664, 438755, 438291, H01L 21336, H01L 218234
Patent
active
059151811
ABSTRACT:
A process for fabricating a deep submicron MOSFET device has been developed, featuring a local threshold voltage adjust region in a semiconductor substrate, with the threshold voltage adjust region self aligned to an overlying polysilicon gate structure. The process consists of forming a narrow hole opening in a dielectric layer, followed by an ion implantation procedure used to place the threshold voltage adjust region in the specific area of the semiconductor substrate, underlying the narrow hole opening. A polysilicon deposition, followed by a metal deposition and anneal procedure, converts the unwanted polysilicon to a metal silicide layer, while leaving unconverted polysilicon in the narrow hole opening. Selective removal of the metal silicide layer results in a narrow polysilicon gate structure, in the narrow hole opening, self aligned to the threshold voltage adjust region.
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Ackerman Stephen B.
Mulpuri Savitri
Saile George O.
Vanguard International Semiconductor Corporation
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