Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2000-12-22
2001-09-11
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S253000, C438S255000, C438S398000, C438S482000
Reexamination Certificate
active
06287910
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for fabricating capacitors for semiconductor devices and, more particularly, to a method for fabricating capacitors for semiconductor devices that provide the increased levels of capacitance necessary for more highly integrated devices while maintaining suitable electrical characteristics.
2. Description of the Related Art
In order to obtain semiconductor devices having higher degrees of integration, active research and development efforts continue to be directed toward both reducing cell area and reducing the device operating voltage. Although high levels of device integration greatly reduce the wafer area available for capacitor formation, the charge capacity preferred for an operation of a memory device remains on the order of 25 fF per cell despite the reduction in cell area. This level of charge is useful in preventing the generation of soft errors and avoiding reductions in the refresh time.
Conventional DRAM capacitors commonly use a dielectric film having a stacked nitride/oxide (NO) structure, a three-dimensional lower electrode structure, such as a cylinder, and/or reduced dielectric thickness to obtain sufficient capacitance values. Despite these measures, however, the conventional NO dielectric (with a dielectric constant of approximately 4-5) is generally unable to provide sufficient capacitance within the cell dimensions required for highly integrated (256M and above) semiconductor devices.
Other efforts to increase the capacitance values have sought to replace the conventional oxide or NO dielectric layers with a more complex ONO (Oxide-Nitride-Oxide) or a metal based dielectric layer such as Ta
2
O
5
or BST (BaSrTiO
3
) that provides a significantly increased dielectric constant (approximately 20 to 25) to obtain the increased capacitance values necessary for production of advanced semiconductor devices.
In a nominal Ta
2
O
5
thin film, however, substitutional Ta atoms inevitably exist as a result of composition ratio variations between the Ta and O atoms within the film. The nominal stoichiometry, although convenient, does not reflect the inherent chemical instability of the Ta
2
O
5
film. In other words, substitutive Ta atoms in the form of oxygen vacancies are always present in the Ta
2
O
5
thin film due to the variable and unstable stoichiometry of the Ta2O5 material. Furthermore, although the number of oxygen vacancies may be varied somewhat depending on the actual composition and bonding degrees of the incorporated elements, the oxygen vacancies cannot be completely eliminated from the dielectric thin film.
In addition, during the formation of the Ta
2
O
5
thin film, the organic portions from the Ta(OC
2
H
5
)
5
, a precursor compound used in forming the Ta
2
O
5
film, can react with O
2
or N
2
O gas during the LPCVD process to form various impurities including carbon (C), carbon compounds (such as CH
4
and C
2
H
4
), and water vapor (H
2
O), that are, in turn, incorporated into the Ta
2
O
5
thin film. As a result of these impurities, as well as other ions, free radicals and oxygen vacancies that may be present in the Ta
2
O
5
film, the resulting capacitors tend to exhibit increased leakage current and degraded dielectric characteristics.
Although the impurities present in the Ta
2
O
5
thin film may be removed or significantly reduced by repeatedly applying a low-temperature treatment (for example, a plasma N
2
O or UV-O
3
treatment), these remedial steps add to the overall process complexity and can be difficult to control. Furthermore, even these low-temperature treatments may be sufficient to cause unwanted oxidation at the interface between the Ta
2
O
5
film and the lower electrode, lowering the effective dielectric constant.
SUMMARY OF THE INVENTION
The method according to the present invention has been developed to overcome the above mentioned problems and limitations experienced with and/or inherent in prior art processes and materials. It is an object of the invention to provide a method for fabricating capacitors for semiconductor devices that exhibit improved electrical characteristics while ensuring sufficient capacitance to support advanced semiconductor devices.
Another object of the invention is to provide a method for fabricating capacitors for semiconductor devices that renders unnecessary certain process steps designed to increase the effective capacitor area and thus ensure a sufficiently high capacitance. By allowing these steps to be eliminated, the present invention simplifies the manufacturing process by reducing the number of processing steps, thereby also reducing both the processing time and the associated manufacturing costs.
In accordance with one aspect, the present invention provides a method for fabricating a capacitor for a semiconductor device, comprising the steps of: forming a lower electrode on an understructure of a semiconductor substrate; depositing an amorphous TaON thin film over the lower electrode; subjecting the amorphous TaON thin film to a thermal process in an NH
3
atmosphere to form a Ta
3
N
5
dielectric film; and forming an upper electrode on the Ta
3
N
5
dielectric film.
In another embodiment, the present invention provides a method for fabricating a capacitor for a semiconductor device, comprising the steps of: forming a lower electrode on an understructure of a semiconductor substrate; forming an amorphous TaON thin film over the lower electrode; subjecting the amorphous TaON thin film to a thermal process in an NH
3
atmosphere at a temperature of 600 to 950° C. to form a Ta
3
N
5
dielectric film; annealing the Ta
3
N
5
dielectric film; and forming an upper electrode on the Ta
3
N
5
dielectric film.
In another embodiment, the present invention provides a method for fabricating a capacitor for a semiconductor device, comprising the steps of: forming a lower electrode on an understructure of a semiconductor substrate; nitriding the lower electrode in an NH
3
atmosphere; forming an amorphous TaON thin film over the lower electrode; subjecting the amorphous TaON thin film to a thermal process in an NH
3
atmosphere at a temperature of 600 to 950° C. to form a Ta
3
N
5
dielectric film; annealing the Ta
3
N
5
dielectric film; and forming an upper electrode on the Ta
3
N
5
dielectric film.
The above objects, and other features and advantages of the present invention will become more apparent in light of the following detailed description and the accompanying figures.
REFERENCES:
patent: 5352623 (1994-10-01), Kamiyama
patent: 6201276 (2001-03-01), Agarwal et al.
patent: 02000058878A (2000-02-01), None
Lee Kee Jeung
Yang Hong Seon
Bowers Charles
Chen Jack
Hyundai Electronics Industries Co,. Ltd.
Pillsbury & Winthrop LLP
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