Method for fabrication of SiGe layer having small poly...

Details Method for fabrication of SiGe layer having small poly... Method for fabrication of SiGe layer having small poly...

2005-03-01

2005-03-01

Dang, Phuc T. (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S488000

Reexamination Certificate

active

06861308

ABSTRACT:
A disclosed embodiment is a method for fabricating a SiGe layer, the method comprising depositing a silicon buffer layer over a single crystalline region and at least one isolation region at a first pressure, where the silicon buffer layer is continuous, i.e. comprises small poly grains, over the at least one isolation region. The method further includes forming a silicon germanium layer over the silicon buffer layer at a second pressure, where the silicon germanium layer is also continuous, i.e. comprises small poly grains, over the at least one isolation region. In one embodiment, the first pressure is less than the second pressure. In other embodiments, a structure is fabricated according to the above method.

REFERENCES:
patent: 6534802 (2003-03-01), Schuegraf

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