Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-09-13
1997-08-12
Chaudhari, Chandra
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438305, 438595, H01L 218234
Patent
active
056565186
ABSTRACT:
In the present invention, a method for fabrication of a non-symmetrical LDD-IGFET is described. The present invention includes a gate insulator and a gate electrode, such as a polysilicon, formed over a semiconductor substrate, the gate electrode having a top surface and opposing first and second sidewalls. A first dopant is implanted to provide a lightly doped drain region substantially aligned with the second sidewall. An oxide layer provides first and second sidewall oxide regions adjacent the first and second sidewalls, respectively. The first sidewall oxide region is isolated using a nitride layer having a window which exposes the second sidewall oxide region. Thermal oxidation is applied to the second sidewall oxide region wherein the size of the second sidewall oxide region increases while the size of the first sidewall oxide region remains substantially constant. The first sidewall oxide region is then exposed by removing the nitride layer and a second dopant is implanted to provide a heavily doped drain region substantially aligned with the outside edge of the second sidewall oxide region and a heavily doped source region.
REFERENCES:
patent: 5286664 (1994-02-01), Horiuchi
patent: 5424229 (1995-06-01), Oyamatsu
patent: 5547885 (1996-08-01), Ogoh
Gardner Mark I.
Kadosh Daniel
Wristers Derick J.
Advanced Micro Devices , Inc.
Chaudhari Chandra
Sigmond David M.
Thomas Toniae M.
Tsirigotis M. Kathryn
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