Method for fabricating trench power MOSFET

Details Method for fabricating trench power MOSFET Method for fabricating trench power MOSFET

2006-06-13

2006-06-13

Smith, Matthew S. (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S589000, C438S702000, C438S947000

Reexamination Certificate

active

07060567

ABSTRACT:
A method for fabricating trench power MOSFET is described. An epitaxial layer and a mask layer having a first opening are sequentially formed on a substrate. A pair of spacers is formed on the sidewalls of the first opening. A second opening exposing the surface of the epitaxial layer is formed by removing a portion of the mask layer. The spacers are removed and then a trench is formed in the epitaxial layer using the mask layer as a mask. The mask layer is removed and a gate oxide layer is formed over the epitaxial layer and the surface of the trench. A gate layer is formed to fill the trench. A body well region is formed in the epitaxial layer adjacent to the sidewalls of the trench. A source region is formed in the body well region on each side at the top of the trench.

REFERENCES:
patent: 5045903 (1991-09-01), Meyer et al.
patent: 5093273 (1992-03-01), Okumura
patent: 5897343 (1999-04-01), Mathew et al.
patent: 6211018 (2001-04-01), Nam et al.
patent: 6518129 (2003-02-01), Hueting et al.
patent: 2002/0123195 (2002-09-01), Frisina et al.
patent: 2003/0096479 (2003-05-01), Hshieh et al.
patent: 2006/0019447 (2006-01-01), Gutsche et al.

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