Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-10-10
2006-10-10
Le, Dung A. (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S259000, C257S330000, C257S333000, C257SE29200, C257SE21400
Reexamination Certificate
active
07118971
ABSTRACT:
Embodiments of the invention relate to a fabrication method of an electronic device, more particularly to a fabrication method of a power device in which an oxide layer at the bottom of the trench is provided to reduce Miller capacitance and further reduce RC delay. In one embodiment, a method for forming an oxide layer at the bottom of a trench comprises providing a first substrate with at least one trench therein; forming a first oxide layer on the bottom and sidewalls of the trench; removing the first oxide layer at the bottom of the trench; and forming a second oxide layer at the bottom of the trench.
REFERENCES:
patent: 6319776 (2001-11-01), Tung
patent: 6437386 (2002-08-01), Hurst et al.
patent: 6444528 (2002-09-01), Murphy
patent: 2004/0014263 (2004-01-01), Fujishima et al.
Chang Jen-Chieh
Chung Yi-Fu
Hung Tun-Fu
Le Dung A.
Mosel Vitelic Inc.
Townsend and Townsend / and Crew LLP
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