Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
1998-10-23
2002-01-15
Trinh, Michael (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S149000, C438S161000
Reexamination Certificate
active
06338990
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for fabricating a thin-film transistor, particularly to a method for forming a driver element of an active-matrix-drive liquid crystal display device.
2. Description of the Related Art
An active-matrix-drive liquid crystal display device and a direct-multiplex-drive liquid crystal display device are used as a display unit for a terminal of an information processing equipment or the like.
Because the active-matrix-drive liquid crystal display device independently drives each of many picture elements, it does not decrease the liquid-crystal driving duty ratio, contrast, or viewing angle differently from the simple matrix type even if the number of scanning lines increases due to increase of the information content to be displayed.
Therefore, the active matrix type provides color display equivalent to that of a cathode ray tube (CRT) and is more widely used as a thin flat display.
A thin-film transistor (hereafter referred to as TFT) is used as an element for driving a picture element electrode of the active-matrix-drive liquid crystal display device having the above advantage.
The TFT is divided into the stagger type shown in FIG.
1
and the inverted stagger type shown in
FIG. 4
because of their structural difference.
The stagger-type TFT, as shown in
FIG. 1
, comprises a light-shielding film
2
formed in a TFT region on a transparent substrate
1
, an insulating film
3
covering the light-shielding film
2
, a source electrode
4
s
and a drain electrode
4
d
formed on the insulating film
3
, a contact layers
5
s
and
5
d
formed on the source electrode
4
s
and drain electrode
4
d,
an active semiconductor layer
6
formed from the top of the two contact layers
5
s
and
5
d
to the region between them, and a gate electrode
8
formed on the active semiconductor layer
6
through a gate insulating film
7
.
The light-shielding film
2
is formed to prevent light from entering a channel region layer of the active semiconductor layer
6
but it is unnecessary in some cases.
The insulating film
3
is formed between the light-shielding film
2
and the active semiconductor layer
6
so as to entirely cover the substrate
1
.
The source electrode
4
s
and drain electrode
4
d
formed on the insulating film
3
are made of, for example, an indium-tin oxide film (hereafter referred to as ITO film). The contact layers
5
s
and
5
d
are made of an n
+
amorphous silicon film (hereafter referred to as a-Si film) and phosphorus is introduced into the a-Si film. The active semiconductor layer
6
serving as the channel region is made of amorphous silicon.
The source electrode
4
s
and drain electrode
4
d
and the contact layers
5
s
and
5
d
are formed by pattering the ITO film and a-Si film
5
. Patterning of them is, as shown in
FIG. 2A
, performed by using a patterned resist film
10
as a mask and etching the ITO film
4
and a-Si film
5
exposed from the resist film
10
. In this patterning step, the ITO film
4
exposed from the resist film
10
is over-etched so that it does not remain on the insulating film
3
. Therefore, as shown in
FIG. 2A
, at the ends of the source electrode
4
s
and drain electrode
4
d,
facing each other (portions A in FIG.
2
A), the ITO film
4
constituting these electrodes is side-etched and therefore the a-Si film
5
on the ITO film
4
is overhung. The overhung film
5
causes the thickness of the a-Si film
6
serving as the active semiconductor layer
6
to decrease or the film
6
to be cut, causing the TFT to malfunction.
To prevent the above phenomenon from occurring, a method is considered to pattern the ITO film
4
and thereafter pattern the a-Si film serving as a contact layer as shown in FIG.
3
A. For this method, however, it is difficult to adjust a pattern of the ITO film
4
to that of the a-Si film
5
and the ITO film
4
may be exposed at the channel region because these films are formed stepwise. And, as shown in
FIG. 3B
, when an a-Si film
7
b
serving as the active semiconductor layer
6
is entirely formed on the stepwise region, silicon on the ITO film
4
exposed from the contact layers
5
s
and
5
d
may be abnormally deposited and the abnormal deposition impairs transistor characteristics.
Even if the abnormal deposition is avoided, the resist or etching solution used to pattern the ITO film
4
may remain on the surface of the ITO film
4
or contact layers
5
s
and
5
d.
Thereby, the surface of the ITO film
4
or a-Si film
5
is contaminated. This causes a problem that the surface imperfectly contacts a film formed on the surface.
To solve the above problem, a method for selectively depositing silicon on a conductive film is proposed in the following literatures.
[1] G. N. Parsons, Appl. Phys. Lett. 59 (1991) pp. 2546-2548
[2] G. N. Parsons, IEEE Electron Device Lett. Vol. 13 (1992) pp. 80-82
In these literatures, an art is proposed to selectively deposit silicon on a source electrode and a drain electrode as a contact layer. If selective deposition is smoothly performed, neither overhanging nor stepwise region previously mentioned do not occur on an ITO film. The deposition temperature shown in these literatures ranges from 250 to 300° C.
The inverted-stagger-type TFT, as shown in
FIG. 4
, comprises a gate electrode
12
formed on a transparent substrate
11
, a gate insulating film
13
covering the gate electrode
12
, an active semiconductor layer
14
covering the gate insulating layer
13
, a channel protective coat
15
formed on the active semiconductor layer
14
above the gate electrode
12
, and a source electrode
16
s
and a drain electrode
16
d
divided on the channel protective coat
15
and formed on the active semiconductor layer
14
. Moreover, contact layers
17
s
and
17
d
are formed between the source electrode
16
s
and the active semiconductor layer
14
and between the drain electrode
16
d
and the active semiconductor layer
14
. The gate electrode
12
and channel protective coat
15
are formed in almost same size.
The source electrode
16
s
and drain electrode
16
d
are made of a Ti film, the contact layers
17
d
and
17
d
are made of n
+
-type a-Si, the active semiconductor layer
14
is made of a-Si.
The following are steps of forming the source electrode
16
s,
drain electrode
16
d,
and contact layers
17
s
and
17
d
of the inverted-stagger-type TFT.
As shown in
FIG. 5A
, an n
+
-type a-Si film
17
and a Ti film
18
are laminated and thereafter a resist film
19
is applied onto the Ti film
18
. Then, the resist film
19
is exposed by using an exposure mask PM and it is developed to form a pattern for forming a source and drain. Then, as shown in
FIG. 5B
, the Ti film
18
and n
+
-type a-Si film
17
are patterned by using a resist film
19
as a mask.
In this patterning, a margin is given to the pattern of the resist film
19
so that the pattern overlaps with the both sides of the channel protective coat
15
because it is difficult to adjust the edges of the source electrode
16
s
and drain electrode
16
d
to the edge of the gate electrode
12
.
As a result, the gate electrode
12
, as shown in
FIG. 5B
, has the width Lsd for securing a channel region and the margin width “&Dgr;L×2” where the source electrode
16
s
overlaps with the drain electrode
16
d.
Thus, the channel length Lg comes to a value close to Lg=Lsd+2&Dgr;L.
The parasitic capacity of the TFT increases due to the margin &Dgr;L. When the parasitic capacity increases, it is also necessary to increase a storage capacity connected to the TFT in order to prevent a static screen of a liquid crystal display device from being baked and the increase of the storage capacity causes the opening rate to decrease.
To solve the problem, a method is considered to form the source electrode
16
s
and drain electrode
16
d
in self-alignment by using the lift-off method.
For example, in
FIG. 6A
, an n
+
-type a-Si film
21
an
Hirano Takuya
Ohgata Koji
Oki Ken-ichi
Takizawa Yutaka
Tanaka Tsutomu
Fujitsu Limited
Trinh Michael
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