Method for fabricating SRAM cell

Details Method for fabricating SRAM cell Method for fabricating SRAM cell

1998-04-28

2000-05-23

Tsai, Jey

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438384, H01L 218244

Patent

active

060665246

ABSTRACT:
An SRAM cell and method for fabricating the same including first and second access transistors, first and second drive transistors, and first and second load resistors. A first terminal of the first access transistor, a gate terminal of the second drive transistor, and a first load resistor terminal are connected to one another to form a first cell node terminal. A first terminal of the second access transistor, a gate terminal of the first drive transistor, and a second load resistor terminal are connected to one another to form a second cell node terminal. The SRAM cell includes a gate electrode of each of the first and second drive transistors arranged over a semiconductor substrate in a first direction, and a gate electrode of each of the first and second access transistors arranged in the first direction overlapped with portions of the gate electrodes of the first and second drive transistors.

REFERENCES:
patent: 5824579 (1998-10-01), Subramanian et al.
patent: 5939760 (1999-08-01), Batra et al.
Shuji Ikeda et al., "A Stacked Split Word-Line (SSW) Cell for Low Voltage Operation, Large Capacity, High Speed SRAMs", IEDM, 1993, pp. 809-812.

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