Method for fabricating semiconductor memory

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C257SE21179

Reexamination Certificate

active

07601594

ABSTRACT:
A method for fabricating a semiconductor memory, the method including: forming an element isolation region in a concave portion of the semiconductor substrate; forming a layer of a gate electrode material so as to cover the concave portion and the element isolation region; forming a gate electrode by forming a mask on a surface of the layer of a gate electrode material so that a height from an upper surface of the convex portion to the surface of the mask is higher than a height from the surface of the element isolation region to the upper surface of the convex portion and by patterning the layer of the gate electrode material; forming a charge storing layer at least one of side surfaces of the gate electrode in contact with the convex portion; and forming a sidewall on a part of the charge storing layer.

REFERENCES:
patent: 6358799 (2002-03-01), Odanaka et al.
patent: 2002-118255 (2002-04-01), None
patent: 2005-064295 (2005-03-01), None
patent: 2006-024680 (2006-01-01), None

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