Method for fabricating semiconductor integrated circuit device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S258000, C438S396000

Reexamination Certificate

active

06300190

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a method for fabricating a semiconductor integrated circuit device including field effect transistors (FETS) and capacitors that are integrated together on the same semiconductor substrate.
Hereinafter, a known method for fabricating a semiconductor integrated circuit device including FET and capacitor on the same substrate will be described with reference to
FIGS. 7A through 7E
.
First, although not shown, a channel region and respective doped regions to be source/drain regions are defined in predetermined regions within a semiconductor substrate
1
. Next, the surface of the substrate
1
is coated with a resist film, which is then patterned by a phase-shifting technique. In this manner, a fine-line resist pattern
2
is formed in a region on the substrate
1
(i.e., a region over the channel region) where a gate electrode will be formed, as shown in FIG.
7
A.
Subsequently, as shown in
FIG. 7B
, an insulating film
3
of silicon dioxide is deposited over the entire surface of the substrate
1
and the resist pattern
2
is lifted off. As a result, an opening
3
a
is formed in the insulating film
3
for the gate electrode of an FET. In this specification, this opening
3
a
will be called a “gate electrode opening” for convenience sake.
Then, as shown in
FIG. 7C
, a lower electrode
4
A is formed in a region over the insulating film
3
where a capacitor will be formed. Thereafter, as shown in
FIG. 7D
, a strontium titanate (SrTiO
3
) film
5
and a metal film
6
are deposited in this order by plasma-enhanced RF sputtering over the entire surface of the insulating film
3
as well as over the lower electrode
4
. In the next process step, these films
5
and
6
will be shaped into capacitive insulating film and upper electrode, respectively.
Next, the metal film
6
and SrTiO
3
film
5
are wet-etched, thereby forming the upper electrode
6
A and capacitive insulating film
5
A, respectively, as shown in FIG.
7
E.
Finally, as shown in
FIG. 7F
, metallization is carried out to fill in the opening
3
a
of the insulating film
3
and thereby form a gate electrode
7
. Also, ohmic electrodes
8
are formed as source/drain electrodes on right- and left-hand sides of the gate electrode
7
. As a result, a conventional semiconductor integrated circuit device including FET and capacitor is obtained.
The prior art method, however, has the following drawbacks. Specifically, in the process step shown in
FIG. 7D
of depositing the SrTiO
3
film
5
by plasma-enhanced RF sputtering, a surface region of the substrate
1
, e.g., the channel region, in particular, is unintentionally exposed to the plasma through the gate electrode opening
3
a
of the insulating film
3
. Then, crystal imperfections are caused in the channel region to considerably decrease the mobility of electrons traveling therethrough. Specifically, once the SrTiO
3
film
5
is deposited, the electron mobility in the channel region decreases from about 5500 cm
2
/V·sec. to about 3200 cm
2
/V·sec. As a result, the operating characteristics of the FET deteriorate.
It is not impossible to prevent the substrate
1
from being exposed to the plasma through the gate electrode opening
3
a
by depositing the SrTiO
3
film
5
before the opening
3
a
has been formed in the insulating film
3
. However, another problem arises in such a case. This new problem will be described below with reference to FIG.
8
.
According to this alternate technique, a capacitor, consisting of the lower electrode
4
A, capacitive insulating film
5
A and upper electrode
6
, is formed on the insulating film
3
that has been deposited on the semiconductor substrate
1
. Then, the entire surface of the substrate
1
is coated with a resist film
9
as shown in FIG.
8
. In such a case, a level difference exists between the capacitor and surrounding regions thereof on the insulating film
3
, and the thickness of the resist film
9
is non-uniform. Thus, if the resist film
9
is irradiated with exposing radiation L
E
to provide a gate electrode opening
9
a
in the resist film
9
, the exposing radiation L
E
, which has passed through the resist film
9
, is diffused by the level difference portion of the capacitor toward the surrounding regions. As a result, the opening
9
a
of the resist film
9
has its size increased or decreased from the desired one due to the reflected radiation L
R
. Accordingly, if the insulating film
3
is etched to form the gate electrode opening
3
a
therethrough using the resist film
9
with such an opening
9
a
as a mask, then the size of the resulting gate electrode opening
3
a
deviates from the predetermined value. This problem gets even more serious when the resist film
9
is provided with the opening
9
a
by a phase-shifting technique.
Thus, to provide a gate electrode opening of a very small size for the insulating film
3
, the capacitor has to be formed after the gate electrode opening
3
a
has been provided in the insulating film
3
, not before.
SUMMARY OF THE INVENTION
An object of the present invention is eliminating crystal imperfections from the channel region of a semiconductor substrate and thereby avoiding decrease in electron mobility in the channel region even though a capacitive insulating film is deposited after a gate electrode opening has been provided in an insulating film.
To achieve this object, a first exemplary method for fabricating a semiconductor integrated circuit device according to the present invention includes the steps of: a) forming an insulating film over the entire surface of a semiconductor substrate including a channel region for a field effect transistor, the insulating film having a gate electrode opening over the channel region; b) depositing a protective film over the entire surface of the insulating film; c) forming a lower electrode, a capacitive insulating film and an upper electrode in this order in a region on the protective film where a capacitor will be formed; d) removing part of the protective film, with which the gate electrode opening of the insulating film has been filled in, thereby exposing the semiconductor substrate within the gate electrode opening; and e) forming a gate electrode to fill in the gate electrode opening again.
According to the first method of the present invention, after a protective film has been deposited on an insulating film having a gate electrode opening, a capacitive insulating film is formed over the protective film. That is to say, when the capacitive insulating film is formed, the gate electrode opening of the insulating film is filled in with the protective film. Accordingly, it is possible to prevent crystal imperfections from being caused in the channel region of the semiconductor substrate in the process step of depositing the capacitive insulating film. Consequently, the electron mobility does not decrease in the channel region, thus preventing the operating characteristics of the field effect transistor from being deteriorated.
A second exemplary method for fabricating a semiconductor integrated circuit device according to the present invention includes the steps of: a) forming an insulating film over the entire surface of a semiconductor substrate include ing a channel region for a field effect transistor; b) defining a mask pattern on the insulating film, the mask pattern having an opening over the channel region; c) depositing a protective film over the entire surface of the insulating film as well as over the mask pattern; d) forming a lower electrode, a capacitive insulating film and an upper electrode in this order in a region on the protective film where a capacitor will be formed; e) removing part of the protective film, thereby exposing the insulating film inside the opening of the mask pattern, the part removed being located in a region where the field effect transistor will be formed; f) etching the insulating film through the mask pattern, thereby forming a gate electrode opening in the insulating film; and g) forming a gate electr

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