Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-06-05
2007-06-05
Malsawma, Lex (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S682000, C257SE21199, C257SE21636
Reexamination Certificate
active
10978786
ABSTRACT:
The invention relates to a method for fabricating a semiconductor device having a semiconductor body that comprises a first semiconductor structure having a dielectric layer and a first conductor, and a second semiconductor structure having a dielectric layer and a second conductor, that part of the first conductor which adjoins the dielectric layer having a work function different from the work function of the corresponding part of the second conductor. In one embodiment of the invention, after the dielectric layer has been applied to the semiconductor body, a metal layer is applied to the said dielectric layer, and then a silicon layer is deposited on the metal layer and is brought into reaction with the metal layer at the location of the first semiconductor structure, forming a metal silicide. In one embodiment, those parts of the conductors which have different work functions are formed by etching a layer other than the silicon layer, in particular a metal layer, at the location of one of the two semiconductor structures. Furthermore, a further metal layer is applied over the silicon layer and is used to form a further metal silicide at the location of the second transistor. One embodiment of the invention is particularly suitable for use in CMOS technology and results in both PMOS and NMOS transistors with favorable properties.
REFERENCES:
patent: 6200834 (2001-03-01), Bronner et al.
patent: 6512296 (2003-01-01), Gauthier, Jr. et al.
patent: 6902969 (2005-06-01), Adetutu et al.
patent: 2002/0086491 (2002-07-01), Kizilyalli et al.
patent: 2002/0102802 (2002-08-01), Tan et al.
patent: 2003/0124808 (2003-07-01), Lu et al.
patent: 2003/0143825 (2003-07-01), Matsuo et al.
patent: 0 935 285 (1999-08-01), None
patent: 1 211 729 (2002-06-01), None
Henricus van Dal Marcus Johannes
Hooker Jacob Christopher
Schram Tom
Interuniversitair Microelektronica Centrum (IMEC)
Knobbe Martens Olson & Bear LLP
Koninklijke Philips Electronics , N.V.
Malsawma Lex
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