Method for fabricating semiconductor device with vertical gate

Details Method for fabricating semiconductor device with vertical gate Method for fabricating semiconductor device with vertical gate

2011-05-10

2011-05-10

Smith, Matthew S (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S429000, C438S701000, C257S331000, C257SE21658

Reexamination Certificate

active

07939411

ABSTRACT:
A method for fabricating a semiconductor device includes forming buried bit lines in a first substrate; forming a trench that separate the buried bit lines from each other; forming an interlayer insulation layer to gap-fill the trench; forming a second substrate over the first substrate gap-filled with the interlayer insulation layer; forming a protective pattern over the second substrate; forming a plurality of active pillars by etching the second substrate using the protective pattern as an etch barrier; and forming vertical gates surrounding sidewalls of the active pillars.

REFERENCES:
patent: 2007/0080385 (2007-04-01), Kim et al.
patent: 2007/0082448 (2007-04-01), Kim et al.
patent: 2009/0230466 (2009-09-01), Kim
patent: 102007003823 (2007-04-01), None
Notice of Preliminary Rejection issued from Korean Intellectual Property Office on Oct. 25, 2010.

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