Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2001-11-21
2003-06-17
Fahm, Jr., Wael (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S258000
Reexamination Certificate
active
06579757
ABSTRACT:
RELATED APPLICATION
The present application claims the benefit of Korean Patent Application No. P2000-69659, filed Nov. 22, 2000, which is herein fully incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a method for fabricating a semiconductor device which prevents a poor gate of a peripheral region that may be generated due to a difference of pattern density between a cell region and the peripheral region in a memory device.
2. Discussion of the Related Art
A related art method for fabricating a semiconductor device will be described with reference to the accompanying drawings.
FIGS. 1A
to
1
G are sectional views showing related art process steps of fabricating a capacitor of a semiconductor device.
As shown in
FIG. 1A
, a field oxide film
12
is formed in a predetermined region of a semiconductor substrate
11
to define an active region.
Then, a gate oxide film (not shown) is formed on the entire surface of the semiconductor substrate
11
. A first polysilicon film
13
, a tungsten film
14
, a silicon nitride film
15
, and a cap oxide film
16
are sequentially deposited on the gate oxide film. The cap oxide film
16
, the silicon nitride film
15
, the tungsten film
14
, and the first polysilicon film
13
are selectively removed by photolithography and etching processes to form a plurality of gates
17
in a cell region and a peripheral region. At this time, the density of the gates
17
formed in the cell region is higher than the density of the gates formed in the peripheral region.
A first oxide film
18
is then deposited on the entire surface of the semiconductor substrate
11
, and a first photoresist (not shown) is deposited on the entire surface of the resultant structure. Subsequently, the first photoresist is patterned by exposure and developing processes to expose the first oxide film
18
of the cell region. The exposed first oxide film
18
of the cell region is etched back using the patterned first photoresist as a mask to form insulating film spacers
19
at both sides of each of the gates
17
.
As shown in
FIG. 1B
, a second polysilicon film
20
of a predetermined thickness is then deposited on the entire surface of the semiconductor substrate
11
. At this time, a step difference occurs between the second polysilicon film
20
formed in the cell region and the second polysilicon film
20
formed in the peripheral region due to the density difference between the gates
17
formed in the cell region and the gates
17
formed in the peripheral region. In other words, the top surface of the second polysilicon film
20
of the cell region having a higher pattern density (e.g., gates
17
are less spread out) is positioned to be higher than the second polysilicon film
20
of the peripheral region having a lower pattern density.
As shown in
FIG. 1C
, a second photoresist
21
is then deposited on the semiconductor substrate
11
and then selectively patterned by exposure and developing processes to remain only in the peripheral region. Subsequently, the second polysilicon film
20
of the cell region is partially removed to have the same height as the second polysilicon film
20
of the peripheral region using the patterned second photoresist
21
as a mask. Then, the second photoresist
21
is removed completely.
As shown in
FIG. 1D
, a chemical mechanical polishing (CMP) process is performed on the entire surface to remove portions of the second polysilicon film
20
, so that the cap oxide film
16
of the gates
17
both in the cell and peripheral regions is exposed and a flat top surface is provided for the entire structure.
To define a plug region which will be used in the cell region, as shown in
FIG. 1E
, a second oxide film
22
is deposited on the entire surface of the semiconductor substrate
11
.
Subsequently, a third photoresist
23
is deposited on the semiconductor substrate
11
and then patterned by the exposure and developing processes to remain only over the semiconductor substrate
11
of the cell region.
As shown in
FIG. 1F
, the second oxide film
22
of the peripheral region is removed using the patterned third photoresist
23
as a mask to form a masking film
22
a
only in the cell region. However, the second oxide film
22
of the peripheral region and the cap oxide film
16
below the second oxide film
22
are formed of the same material. Accordingly, the cap oxide film
16
of the peripheral region is partially removed during the process for removing the second oxide film
22
in the peripheral region. The third photoresist
23
is then removed.
The second polysilicon film
20
of the peripheral region is then removed using the masking film
22
a
as a mask. At this time, however, the remaining cap oxide film
16
or a portion thereof in the peripheral region is also removed during this process. The silicon nitride film
15
is then removed to expose the tungsten film
14
.
Thus, the aforementioned related art method for fabricating a semiconductor device has at least several problems.
The metal portions of the gates
17
in the peripheral region are exposed as the cap insulating film (cap oxide film and silicon nitride film) in the peripheral region is lost during the etching process. The exposed metal portions of the gates are oxidized due to an annealing process performed in the subsequent process of forming a capacitor of a memory device, which increase the resistivity of the gates significantly. This problem then reduces an operational speed of the device and its reliability.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a method for fabricating a semiconductor device that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a method for fabricating a semiconductor device which prevents gates of a peripheral region from being oxidized, so as to improve the reliability and performance characteristics of the device.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objects and advantages of the invention may be realized and attained as particularly pointed out in the appended claims.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a method of fabricating a semiconductor device according to an embodiment of the present invention includes the steps of: forming a plurality of stack gates on a semiconductor substrate in a cell region and a peripheral region; depositing a first insulating film on an entire surface of the semiconductor substrate; selectively removing the first insulating film formed in the cell region to form insulating film spacers at both sides of the gates formed in the cell region; depositing a polysilicon film on the entire surface of the semiconductor substrate, partially removing the polysilicon film formed in the cell region by an etching process using a mask for exposing the cell region to be lower than the polysilicon film formed in the cell region by a predetermined size; exposing a surface of the gates formed in the cell region by performing a planarizing process on the entire surface; forming a masking film on the semiconductor substrate of the cell region; and removing the polysilicon film of the peripheral region using the masking film as a mask.
According to another aspect of the present invention, a method of fabricating a semiconductor device, includes the steps of forming a plurality of stack gates on a semiconductor substrate in a cell region and a peripheral region, forming a first insulating film over the semiconductor substrate, selectively removing the first insulating film formed in the cell region to form insulating film spac
Kim Jae Hyung
Ko Sang Gi
Oh Hee Joong
Song Byoung Ock
Birch & Stewart Kolasch & Birch, LLP
Fahm, Jr. Wael
Hynix / Semiconductor Inc.
Pham Hoai
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