Method for fabricating semiconductor device using a CVD...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S264000, C438S530000

Reexamination Certificate

active

06472281

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a method for fabricating a semiconductor device including a highly reliable gate insulator film and functioning as an MOS field effect transistor (MOSFET) or a nonvolatile semiconductor memory device.
In a great number of fields, semiconductor devices such as MOSFET's or nonvolatile semiconductor memory devices have been used very widely and frequently. As is well known in the art, in a MOSFET, a gate electrode is formed on a gate insulator film, an underlying region of which functions as channel region. Source/drain layers are formed on both sides of the channel. And the value of current flowing between the source/drain layers and the ON/OFF states of the device are controlled based on a voltage applied to the gate electrode. A nonvolatile semiconductor memory device includes not only the members of a MOSFET but also a floating gate electrode, interposed between the gate insulator film and the gate electrode of a MOSFET, for retaining charges.
FIGS.
15
(
a
) through
15
(
d
) are cross-sectional views illustrating respective process steps for fabricating a prior art semiconductor device functioning as a MOSFET. As shown in FIG.
15
(
d
), the device includes: a semiconductor substrate
111
; a gate oxide film
112
; a gate electrode
113
; LDD layers
115
a
and
115
b;
sidewall spacers
116
a
and
116
b;
and source/drain layers
117
and
118
. In FIG.
15
(
b
), the reference numeral
114
denotes arsenic ions implanted as dopant ions into the substrate
111
to form the LDD layers
115
a
and
115
b.
Hereinafter, a method for fabricating the prior art semiconductor device will be described with reference to FIGS.
15
(
a
) through
15
(
d
).
First, in the process step shown in FIG.
15
(
a
), a gate electrode
113
is formed over an Si substrate
111
of a first conductivity type (e.g., P-type) with a gate oxide film
112
interposed therebetween.
Next, in the process step shown in FIG.
15
(
b
), arsenic ions
114
are implanted as low-concentration dopant ions of a second conductivity type from above the gate electrode
113
into the Si substrate
111
. As a result, LDD layers
115
a
and
115
b
are formed inside the Si substrate
111
on both sides of the gate electrode
113
.
Then, in the process step shown in FIG.
15
(
c
), an insulator film such as a silicon dioxide film is deposited over the substrate, and then etched anisotropically to form sidewall spacers
116
a
and
116
b
on the side faces of the gate electrode
113
. In this process step, portions of the gate oxide film
112
, not covered with the gate electrode
113
or the sidewall spacers
116
a
and
116
b,
are also etched.
Thereafter, in the process step shown in FIG.
15
(
d
), arsenic ions are implanted as high-concentration dopant ions of the second conductivity type from above the gate electrode
113
and the sidewall spacers
116
a
and
116
b
into the Si substrate
111
. As a result, source/drain layers
117
and
118
are formed along the outer periphery of the LDD layers
115
a
and
115
b,
respectively.
A nonvolatile semiconductor memory device having a structure in which gate oxide film, floating gate electrode, ONO film and control gate electrode are stacked one upon the other is also formed basically by performing the same steps as those shown in FIGS.
15
(
a
) through
15
(
d
).
A conventional MOSFET or nonvolatile semiconductor memory device having such a structure has problems that the leakage or disturb characteristics (variation in threshold voltage with time) thereof are greatly variable or deteriorative and that the values themselves should also be improved to a large degree. In order to spot the root of these problems, the present inventors carried out intensive research on what brings about such variation or deterioration in characteristics. As a result, we arrived at a conclusion that such variation or deterioration might possibly result from the damage caused at the ends of a gate oxide film during the implantation of dopant ions. Specifically, in the process step of implanting dopant ions as shown in FIG.
15
(
b
), the ions are usually implanted obliquely, e.g., at a tilt angle of about 7 degrees with respect to a normal of the substrate surface to prevent channeling. Accordingly, during this process step, the dopant ions might pass through the ends of the gate oxide film to be unintentionally introduced into the gate oxide film. Similarly, in a nonvolatile semiconductor memory device, dopants seem to be accidentally introduced into an interlevel dielectric film made of ONO, for example, as well as into the gate oxide film.
Also, it was already observed that unwanted bird's beaks are formed at locally thickened ends of a gate oxide film during a fabrication process including a processing step of conducting a heat treatment in an oxidizing ambient. If such bird's beaks are formed, then the gate length has virtually increased. Thus, the same effects as those caused with an increased gate length are possibly brought about. That is to say, the threshold voltage might become variable.
In a nonvolatile semiconductor memory device, in particular, if bird's beaks are formed in a gate oxide film, then the efficiency, with which electrons are injected/ejected into/out of the gate, adversely deteriorates. Also, if bird's beaks are formed in an interlevel dielectric film between floating gate and control gate electrodes, then stress might be locally applied to these beaks, resulting in deterioration in characteristics of the device.
SUMMARY OF THE INVENTION
An object of this invention is providing a method for fabricating a semiconductor device functioning as a MOSFET with characteristics such as threshold voltage less variable or improved by taking various measures to prevent damage or bird's beaks from being caused at both ends of a gate oxide film.
Another object of the present invention is providing a method for fabricating a semiconductor device functioning as a nonvolatile semiconductor memory device with characteristics such as threshold voltage less variable or improved by taking various measures to prevent damage or bird's beaks from being caused in a gate oxide film.
A first method according to the present invention is a method for fabricating a semiconductor device functioning as an MOS field effect transistor. The method includes the steps of: a) forming a gate insulator film and a gate electrode on a semiconductor substrate in this order; b) forming a CVD insulator film to cover an exposed surface of the gate electrode by performing a CVD process; c) forming LDD layers in the semiconductor substrate by implanting dopant ions into the semiconductor substrate from above the gate electrode and the CVD insulator film; d) forming sidewall spacers over the side faces of the gate electrode with the CVD insulator film interposed therebetween; and e) forming source/drain layers in the semiconductor substrate.
In accordance with this method, it is possible to suppress the passage of dopant ions, implanted into the semiconductor substrate in the step c), through the ends of the gate electrode, resulting in the suppression of damage caused in the gate insulator film. Accordingly, a semiconductor device including a highly reliable gate insulator film can be fabricated and the reliability of the semiconductor device can be improved. In addition, since an insulator film can be grown by CVD at a temperature as low as 800° C. or less, no bird's beaks are formed in the gate insulator film. Thus, the CVD insulator film constitutes no obstacle to the miniaturization of a semiconductor device. Furthermore, since the gate electrode is covered with the CVD insulator film, it is possible to prevent the dopants introduced into the gate electrode from diffusing to pass through the gate electrode. As a result, a semiconductor device with less variable characteristics can be formed.
In one embodiment of the present invention, the first method may further include, between the steps b) and c), the

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